CLOCK CIRCUITS Search Results

block diagram of pentium D

Abstract: K and M Electronics ICS9148-26 SM8702AM AMD-k6 CPU pinout
Contextual Info: SM8702AM Clock Generator IC NIPPON PRECISION CIRCUITS INC. OVERVIEW FEATURES Intel Pentium II, Pentium III, and AMD x86compatibles supported 2.5/3.3V CPU clock outputs and IOAPIC clock output 14 x SDRAM clock outputs 3 DIMMs 2 × CPU clock outputs

sm 0038 PIN DIAGRAM

Abstract: f control method P0C7
Contextual Info: SHARP SM8504/SM8506 SYSTEM CONTROL Oscillator Circuit The system clock, leads CPU operation, is one of The SM 8500 series is built-in the m ain-clock and the five clocks w hich divides the m ain-clock fcx sub-clock oscillator circuits fo r generating clock

Contextual Info: INTEGRATED CIRCUITS PTN1111 1:10 PECL clock distribution device Product data File under: System>Communications>Datacommunication>Clock Buffers Functions>ICs>Datacommunication>Clock Buffers Functions>ICs>Logic>Clock Buffers Philips Semiconductors 2001 May 29

Contextual Info: Preliminary Information X1202 2-Wire RTC Real Time Clock/Calendar/Alarms/CPU Supervisor FEATURES DESCRIPTION • • • • The X1202 is a Real Time Clock with Clock/Calendar/ CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to operate,

8B10B

Abstract: AN1925 APP1925 serial link clock signal Signal Path Designer
Contextual Info: Maxim > App Notes > FIBER-OPTIC CIRCUITS Keywords: HFTA-07.0: Precision Reference Clock Usage in Clock and Data Recovery Circuits Mar 13, 2003 APPLICATION NOTE 1925 HFTA-07.0: Precision Reference Clock Usage in Clock and Data Recovery Circuits Applications for clock data recovery CDR abound in telecommunications, optical transceivers, data and storage

QS5806T

Contextual Info: QS5806T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER QS5806T/AT ADVANCE INFORMATION FEATURES: DESCRIPTION − − The QS5806T clock buffer/driver circuits can be used for clock buffering

APA075

Abstract: APA1000 APA150 APA300 APA450 APA600 APA750 AC306 Signal Path Designer
Contextual Info: Application Note AC306 Using ProASICPLUS Clock Conditioning Circuits Introduction ProASICPLUS devices include two clock conditioning circuits on opposite sides of the die. Each clock conditioning circuit contains a Phase Locked Loop PLL , several delay lines, clock multipliers/dividers, and

QS52805T

Abstract: QS52805AT
Contextual Info: QS52805T/AT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER QS52805T/AT ADVANCE INFORMATION FEATURES: DESCRIPTION − − The QS52805T clock buffer/driver circuits can be used for clock buffering

31202G

Abstract: 000D CFS-206
Contextual Info: X1202 2-Wire RTC Real Time Clock/Calendar/Alarms/CPU Supervisor FEATURES DESCRIPTION • • • • The X1202 is a Real Time Clock with Clock/Calendar/ CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and

31202G

Abstract: 000D CFS-206 a1s13 1202ap
Contextual Info: X1202 2-Wire RTC Real Time Clock/Calendar/Alarms/CPU Supervisor FEATURES DESCRIPTION • • • • The X1202 is a Real Time Clock with Clock/Calendar/ CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and

LK A W01

Contextual Info: RGB640 11.0 Pin Descriptions 11.1 Summary Description Number Video Reference Clock Input 1 External Video Clock Input 2 Auxiliary Reference Clock Input 1 Auxiliary PLL Output Clock Output 1 Divided Dot Clock Output 1 Serial Clock Output 1 Load Clock Input

31202G

Abstract: 1202AM EMO1
Contextual Info: X1202 2-Wire RTC Real Time Clock/Calendar/Alarms/CPU Supervisor FEATURES DESCRIPTION • • • • The X1202 is a Real Time Clock with Clock/Calendar/ CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and

QS52805AT

Abstract: QS52805T QS5805AT QS5805BT QS5805T SO20-2
Contextual Info: QS5805T/AT/BT GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER QS5805T/AT/BT ADVANCE INFORMATION FEATURES: DESCRIPTION − − The QS5805T clock buffer/driver circuits can be used for clock buffering

DS31400

Abstract: APP4391 DS3100 DS3101 DS3102 DS3104 DS3105 GR-1244-CORE phase failure protection IC
Contextual Info: Maxim > App Notes > Communications circuits Keywords: stratum 3, stratum 3E, stratum 4E, G.813, G.812, clock, clock sync, clock synchronization, timing card, timing IC, DPLL, master- Apr 03, 2009 slave, redundancy, telecom, SONET, SDH, clock sync, sonet, sdh, equipment protection, synchronous ethernet

32-748

Contextual Info: Preliminary Information X1202 2-Wire RTC Real Time Clock/Calendar/Alarms/CPU Supervisor FEATURES DESCRIPTION • • • • The X1202 is a Real Time Clock with Clock/Calendar/ CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and

APP4391

Abstract: DS3100 DS3101 DS3102 DS3104 DS3105 GR-1244-CORE
Contextual Info: Maxim > App Notes > Communications Circuits T/E Carrier and Packetized Keywords: stratum 3, stratum 3E, stratum 4E, G.813, G.812, clock, clock sync, clock synchronization, timing card, timing IC, DPLL, master-slave, redundancy, telecom, SONET, SDH, clock sync, sonet, sdh, equipment

A1D21

Abstract: 1287I A1H11 A1D10
Contextual Info: Preliminary Information 2-Wire RTC X1287 256K Real Time Clock/Calendar/CPU Supervisor with EEPROM FEATURES DESCRIPTION • • • • The X1287 is a Real Time Clock with clock/calendar CPU Supervisor circuits and two polled alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and

WUPS1-WUPS10

Abstract: TM1D
Contextual Info: SHARP SM8521 SYSTEM CONTROL Oscillator Circuit The system clock, leads CPU operation, is one of The SM8521 is built-in the m ain-clock and sub­ the five clocks w hich divides the m ain-clock fcK clock oscillator circuits for generating clock signal. into 1/2, 1/4, 1/8, 1/16 and 1/32. It also selects

Contextual Info: Application Note Using ProASICPLUS Clock Conditioning Circuits I n tro du ct i on ProASICPLUS The devices include two clock-conditioning circuits on opposite sides of the die. Each clock conditioning circuit contains a Phase Locked Loop PLL , several delay lines, clock multipliers/dividers, and all the

XTAL 27.0000MHZ

Abstract: 22.5792 crystal oscillator 4 pins 33.8688 MHz crystal clock generator 33.8688 MHz crystal oscillator clock SM8707 SM8707DV SM8707EV HP54701A
Contextual Info: SM8707 series Clock Generator with Dual PLLs OVERVIEW The SM8707 series are dual-PLL clock generator ICs, using a 27MHz master clock, that generate independent audio clock, video clock, and signal processor clock outputs needed in DVD player/recorder applications. Each

AN-923

Abstract: C1995 CGS410
Contextual Info: INTRODUCTION As system clock frequencies reach 100 MHz and beyond maintaining control over clock timing becomes very important and difficult Besides microprocessors other video circuits such as RAMDAC Video graphics processors etc require precise clock timing Furthermore system requirements dictate that clock distribution to synchronous system

IDT49FCT

Contextual Info: IDT49FCT5805/A/B/C GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER IDT49FCT5805/A/B/C ADVANCE INFORMATION FEATURES: DESCRIPTION − − − − − − The 49FCT5805 clock buffer/driver circuits can be used for clock

QS532805A

Abstract: QS532805 QS532805B QS5805T
Contextual Info: QS532805/A/B GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER INDUSTRIAL TEMPERATURE RANGE GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER QS532805/A/B FEATURES: DESCRIPTION − − − − − − − − The QS532805 clock buffer/driver circuits can be used for clock buffering

SM8707

Abstract: SM8707DV SM8707EV
Contextual Info: SM8707 series Clock Generator with Dual PLLs OVERVIEW The SM8707 series are dual-PLL clock generator ICs, using a 27MHz master clock, that generate independent audio clock, video clock, and signal processor clock outputs needed in DVD player/recorder applications. Each