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    2009 - Not Available

    Abstract: No abstract text available
    Text: -WIRE SERIAL E2PROM S-24C128C Rev. 4.0_01 _H Block Diagram VCC WP SCL GND Start / Stop , Symbol Condition CIN VIN = 0 V ( SCL , A0, A1, A2, WP) CI / O VI / O = 0 V (SDA) (Ta = +25°C, f = , . 25 2-WIRE SERIAL E2PROM S-24C128C Rev. 4.0_01 _H 6. Data hold time (tHD.DAT = 0 ns) If SCL , S-24C128C 2-WIRE SERIAL E2PROM www.sii-ic.com Rev. 4.0_01 _H © Seiko Instruments Inc , and noise filter on input pins ( SCL , SDA) • Write protect function during the low power supply


    Original     		PDF S-24C128C S-24C128C 128K-bit, 106cycles

    2009 - Not Available

    Abstract: No abstract text available
    Text: Rev. 4.0_01 _H Using S-24C32C/64C 1. Adding a pull-up resistor to SDA I/O pin and SCL input pin In , -24C32C/64C Rev. 4.0_01 _H 6. Data hold time (tHD.DAT = 0 ns) If SCL and SDA of the S-24C32C/64C are , S-24C32C/64C 2-WIRE SERIAL E2PROM www.sii-ic.com Rev. 4.0_01 _H © Seiko Instruments Inc , ms max. • Noise suppression: Schmitt trigger and noise filter on input pins ( SCL , SDA) • Write , . 1 2-WIRE SERIAL E2PROM S-24C32C/64C Rev. 4.0_01 _H Pin Configurations 1. 8-Pin SOP (JEDEC


    Original     		PDF S-24C32C/64C S-24C32C/64C

    2009 - S24C16C

    Abstract: S-24C16CI-J8T1U3 S-24C16C 24C16c s3 13003 S-24C16CI-I8T1U3 S-24C16C16
    Text: -24C16C 2E2PROM 16 K 2048×8 1.6 V5.5 V 1.7 V5.5 V 16 400 kHzVCC = 1.6 V5.5 V SCL , -Pin SOPJEDEC Top view 1 NC 1 8 VCC NC 2 7 WP A2 3 6 SCL GND 4 5 SDA 1 S-24C16CI-J8T1U3 1 2 3 4 5 6 NC*1 NC*1 A2*2 GND SDA*3 SCL *3 , NC A2 GND 8 7 6 5 1 2 3 4 2 S-24C16CI-T8T1U3 2 VCC WP SCL SDA NC*1 NC*1 A2*2 GND SDA*3 SCL *3 VCC : 7 WP GND : 8 VCC *1. GNDVCC *2


    Original     		PDF S-24C16C S-24C16CI-J8T1U3 FM008-A-P-SD-1 FM008-A-C-SD-1 FM008-A-R-SD-1 S24C16C S-24C16CI-J8T1U3 S-24C16C 24C16c s3 13003 S-24C16CI-I8T1U3 S-24C16C16

    2010 - S-24C04C1

    Abstract: S24C04C 24C04C 24C04C1 S-24C04CI-T8T1U S-24C04C S-24C04CIJ8T1 S-24C04CI S-24C04CI-J8T1U S24C04
    Text: SCL , SDA 106*125°C 10025°C 4 K 100 Sn 100%*2 *1. 8 *2. 8-Pin SOPJEDEC , .2.0_00_C 8-Pin SOPJEDEC Top view 1 NC 1 8 VCC A1 2 7 WP A2 3 6 SCL , . GNDVCC *2. High-Z 1 2 3 4 5 6 NC A1 A2 GND SDA*2 SCL *2 8-Pin TSSOP Top view 2 NC A1 A2 GND 8 7 6 5 1 2 3 4 2 S-24C04CI-T8T1U 2 *1 VCC WP SCL SDA NC*1 A1 A2 GND SDA*2 SCL *2 1 2 3 4 5 6 VCC : 7 WP GND : 8


    Original     		PDF S-24C04C S-24C04CI-J8T1U FM008-A-P-SD-1 FM008-A-C-SD-1 FM008-A-R-SD-1 S-24C04C1 S24C04C 24C04C 24C04C1 S-24C04CI-T8T1U S-24C04C S-24C04CIJ8T1 S-24C04CI S-24C04CI-J8T1U S24C04

    2009 - 24C08c

    Abstract: S-24C08C S24C08C s3 13003 CI 4001 100H1 SCL8S-24C08CS-24C08C 24C08
    Text: SCL , SDA 106*125°C 10025°C 8 K 100% *1. 8 *2. 8-Pin SOPJEDEC 8-Pin TSSOP SNT , view 1 NC 1 8 VCC NC 2 7 WP A2 3 6 SCL GND 4 5 SDA 1 S-24C08CI-J8T1U3 1 2 3 4 5 6 NC*1 NC*1 A2 GND SDA*2 SCL *2 , GND 8 7 6 5 1 2 3 4 2 S-24C08CI-T8T1U3 2 VCC WP SCL SDA NC*1 NC*1 A2 GND SDA*2 SCL *2 VCC : 7 WP GND : 8 VCC *1. GNDVCC *2. High-Z 1 2


    Original     		PDF S-24C08C S-24C08C2E2PROM8 K1024 S-24C08CI-J8T1U3 FM008-A-P-SD-1 FM008-A-C-SD-1 FM008-A-R-SD-1 24C08c S-24C08C S24C08C s3 13003 CI 4001 100H1 SCL8S-24C08CS-24C08C 24C08

    s24CS0

    Abstract: S-24C01B 24C02B S-24C02B S-24C04B 24CS02 24C01BD S24C02BF SC-108 JEDEC 24C02BM
    Text: Top view VCC NC 2 7 WP NC 3 6 SCL GND 4 5 SDA WP VCC *1 , -24C04BDP UC T 8 NC NC NC GND SDA SCL 8 1 1 2 3 4 5 6 7 NC 8 VCC NC 2 7 WP NC 3 6 SCL GND 4 5 SDA 2 DI SC S-24C01BFJ S-24C02BFJ S-24C04BFJ 2 2 NU E 1 1 2 3 4 5 6 7 WP 8 *1. *1 NC NC NC GND SDA SCL , 3 S-24C01BMFN S-24C02BMFN S-24C04BMFN WP 1 3 NC NC NC GND SDA SCL 2 NC


    Original     		PDF S-24C01B/02B/04B S-24C01B/02B) S-24C04B) S-24C01B S-24C02B/04B S-24C02B S-24C04B FJ008-D s24CS0 S-24C01B 24C02B S-24C02B S-24C04B 24CS02 24C01BD S24C02BF SC-108 JEDEC 24C02BM

    S-24CS16A0I-H6T1

    Abstract: S-24CS16A0I-J8T1G S-24CS16A S-24CS16A0I-D8S1G S-24CS16A0I-T8T1G SCL 4001 O05005 S24CS16A
    Text: NC 1 8 VCC NC 2 7 WP A2 3 6 SCL GND 4 5 SDA 1 S-24CS16A0I-D8S1G 1 2 3 4 5 6 NC NC A2 GND SDA SCL *1 *2 VCC : 7 WP GND : 8 VCC , A2 3 6 SCL GND 4 5 SDA 2 S-24CS16A0I-J8T1G 2 1 2 3 4 5 6 *1 , GND SDA SCL 2 CMOS E2PROM Rev.4.0_00 S-24CS16A 8-Pin TSSOP Top view NC NC A2 GND 1 2 3 4 8 7 6 5 3 VCC WP SCL SDA 3 S-24CS16A0I-T8T1G 1 2 3 4


    Original     		PDF S-24CS16A S-24CS16A2 E2PROM16 K2048 DP008-F FJ008-A FT008-A HA006-A PH008-A FJ008-D S-24CS16A0I-H6T1 S-24CS16A0I-J8T1G S-24CS16A S-24CS16A0I-D8S1G S-24CS16A0I-T8T1G SCL 4001 O05005 S24CS16A

    24C16A

    Abstract: 24c08an EEPROM 24C08A 24C08A IC 24c08a S24C08AD DP008-ADP008-E S-24C08A S-24C0XA S-24C16A
    Text: ( FJ008-DFJ008-E) A1 2 A2 3 4 7 5 2 7 WP 3 6 SCL 4 5 SDA S , -24C16ADPA-zz-uuw 8 A2 GND SCL 1 A1 WP 6 8-Pin SOP Top view A0 VCC GN 8 1 , SDA SCL WP 4 5 6 7 4 5 6 7 VCC 8 8 SOP S-24C08ANC ()*, S-24C16AGND GND , E2PROM Rev. 1.3_20 WP SCL SDA VCC / GND LOAD COMP LOAD , ) Min. Typ. Max. CIN VIN=0 V ( SCL , A0, A1, A2, WP) - - 10 pF


    Original     		PDF S-24C08A/16A S-24C08A/16A2 E2PROM8K16K1K 400kHz) 100kHz) S-24C08A, S-24C16A) S-24C16A S-24C0XA) DP008-ADP008-E) 24C16A 24c08an EEPROM 24C08A 24C08A IC 24c08a S24C08AD DP008-ADP008-E S-24C08A S-24C0XA S-24C16A

    24C04B

    Abstract: 24C02B S-24C04B S-24C01B S-24C01BFJ S-24C01BMFN S-24C02B S-24C02BFJ S-24C02BMFN S-24C04BFJ
    Text: the SCL line is "L" allows the data to be transmitted. A start or stop condition is recognized when , view 8-pin SOP Top view NC 1 8 NC 2 7 WP NC 3 6 SCL GND 4 , SCL WP SDA S-24C01BFJ S-24C02BFJ S-24C04BFJ VCC WP SCL SDA 1 2 3 4 8 7 6 5 , 5 Ground SDA 5 4 Serial data input/output SCL 6 3 Serial clock input , : Protection invalid VCC 8 1 Power supply Seiko Instruments Inc. * These pins can be


    Original     		PDF S-24C01B/02B/04B S-24C01B/02B/04B 128word 256-word 512-word S-24C01B S-24C02B/04B S-24C01B: S-24C02B: S-24C04B: 24C04B 24C02B S-24C04B S-24C01B S-24C01BFJ S-24C01BMFN S-24C02B S-24C02BFJ S-24C02BMFN S-24C04BFJ

    2009 - digital temperature sensor

    Abstract: S-5851AAA
    Text: the register designated by user will be output synchronizing with the SCL clock from the S , the temperature register will be output from the S-5851A Series synchronizing with the SCL clock , SENSOR S-5851A Series Block Diagram Rev. 2.1_00 SCL Temp Sensor Control Logic SDA VSS , Description Figure 2 AD1 Address input VSS GND SCL Input for serial clock SDA I/O for serial data AD0 , . 1 2 3 4 5 6 Symbol SCL VSS AD1 VDD AD0 SDA Description Input for serial clock GND Address input


    Original     		PDF S-5851A OT-23-6 100art digital temperature sensor S-5851AAA

    2002 - Not Available

    Abstract: No abstract text available
    Text: Input/output capacitance Symbol CIN CI / O Conditions VIN=0 V ( SCL , WP) VI / O=0 V (SDA) Min. -Typ. , ) Pin Assignment 8-pin DIP Top view NC NC NC GND 1 2 3 4 8 7 6 5 VCC WP SCL SDA NC NC NC GND 8-pin SOP Top view 1 2 3 4 8 7 6 5 VCC WP SCL SDA VCC WP SCL SDA 8pin MSOP Top view 1 2 3 4 8 7 6 5 NC NC NC GND , -24C02BDP-1A S-24C04BDP-1A Figure 1 Pin Functions Table 1 Name Pin Number DIP, SOP NC NC NC GND SDA SCL , valid Connected to GND: Protection invalid * These pins can be connected to either Vcc or GND. VCC


    Original     		PDF S-24C01B/02B/04B S-24C01B/02B/04B 128word 256-word 512-word S-24C01B: S-24C02B: S-24C04B: S-24C01B, S-24C02B)

    S-24CS02A

    Abstract: S-24CS08A S-24CS02AFT-TB-G S-24CS08AFJ-TB-1G S-24CS01A S-24CS04A S-24CS04ADP-G S-24CS04AFJ-TB-G S-24CS02AFJ-TB-G
    Text: A0 1 8 VCC A1 2 7 WP A2 3 6 SCL GND 4 5 SDA 1 S , 3 A2 4 GND 5 SDA 6 SCL VCC : 7 WP GND : 8 VCC *1. GNDVCC 2 8-Pin SOP(JEDEC) Top view A0 1 8 VCC A1 2 7 WP A2 3 6 SCL , -24CS08AFJ-TB-1G S-24CS04A/08A*1 2 A1 S-24CS08A*1 3 A2 4 GND 5 SDA 6 SCL VCC : 7 WP GND , 3 8-Pin TSSOP Top view A0 A1 A2 GND 1 2 3 4 8 7 6 5 VCC WP SCL SDA 3


    Original     		PDF S-24CS01A/02A/04A/08A S-24CS01A/02A) S-24CS04A/08A) S-24CS01A S-24CS02A S-24CS04A S-24CS08A DP008-F FJ008-A S-24CS02A S-24CS08A S-24CS02AFT-TB-G S-24CS08AFJ-TB-1G S-24CS01A S-24CS04A S-24CS04ADP-G S-24CS04AFJ-TB-G S-24CS02AFJ-TB-G

    2009 - Not Available

    Abstract: No abstract text available
    Text: the register designated by user will be output synchronizing with the SCL clock from the S , the temperature register will be output from the S-5851A Series synchronizing with the SCL clock , SENSOR S-5851A Series Block Diagram Rev. 2.1_00 SCL Temp Sensor Control Logic SDA VSS , Description Figure 2 AD1 Address input VSS GND SCL Input for serial clock SDA I/O for serial data AD0 , . 1 2 3 4 5 6 Symbol SCL VSS AD1 VDD AD0 SDA Description Input for serial clock GND Address input


    Original     		PDF S-5851A OT-23-6

    2009 - S5851AAA-I6T1G

    Abstract: S-5851AAA S-5851 S-5851AAA-M6T1S
    Text: V) Item Input capacitance I/O capacitance Symbol CIN CI /O Condition VIN = 0 V ( SCL , AD0, AD1) VIN = , acknowledgment signal. 8-bit data in the register designated by user will be output synchronizing with the SCL , byte data in the temperature register will be output from the S-5851A Series synchronizing with the SCL , 2-WIRE DIGITAL TEMPERATURE SENSOR S-5851A Series Block Diagram Rev. 1.1_00 SCL Temp Sensor , VSS GND SCL Input for serial clock SDA I/O for serial data AD0 Address input VDD Power supply Remark


    Original     		PDF S-5851A OT-23-6 S5851AAA-I6T1G S-5851AAA S-5851 S-5851AAA-M6T1S

    2009 - S-5851AAA-M6T1S

    Abstract: S-5851AAA-I6T1G MP006-A S-5851A S-5851AAA S5851AAA-I6T1G
    Text: the temperature register will be output from the S-5851A Series synchronizing with the SCL clock , TEMPERATURE SENSOR S-5851A Series Rev. 1.2_00 Block Diagram SCL Temp Sensor Control Logic , Figure 2 Symbol AD1 Address input VSS GND SCL Input for serial clock SDA I/O for serial data , 3 Symbol Description 1 2 3 4 5 6 SCL VSS AD1 VDD AD0 SDA Input for serial , 3. SCL pin (Input for serial clock) The SCL pin is an input pin for serial clock, processes a


    Original     		PDF S-5851A OT-23-6 S-5851AAA-M6T1S S-5851AAA-I6T1G MP006-A S-5851AAA S5851AAA-I6T1G

    2009 - S-5851AAA-I6T1

    Abstract: S-5851AAA sot T11 K2018
    Text: the register designated by user will be output synchronizing with the SCL clock from the S , . 1 2-WIRE DIGITAL TEMPERATURE SENSOR S-5851A Series Rev. 2.1_00 Block Diagram SCL , 1 6 2 5 3 4 Figure 2 Symbol AD1 Address input VSS GND SCL Input for , Description 1 2 3 4 5 6 4 Symbol Description 1 2 3 4 5 6 SCL VSS AD1 VDD AD0 , load capacity (pF) Figure 4 Output Load 3. SCL pin (Input for serial clock) The SCL pin is an


    Original     		PDF S-5851A OT-23-6 S-5851AAA-I6T1 S-5851AAA sot T11 K2018

    2007 - S-34C02A

    Abstract: XC008-A-R-SD scl4417 XC008
    Text: 1.7 V5.5 V 16 400 kHzVCC = 2.5 V5.5 V SCL , SDA 106*125°C 10025°C 2 K , -34C02A0I-T8T1U VCC VCC WP SCL SDA 8 7 6 5 WP 8 1 2 3 4 A0 A1 A2 GND A0 A1 A2 GND SDA SCL 7 Top view VCC GND PLP-8C 2 Top view A0 A1 A2 GND 8 7 6 5 1 2 3 4 5 6 VCC WP SCL SDA 8 7 6 5 WP 8 A0 A1 A2 GND Bottom view A0 A1 A2 GND SDA SCL 7 VCC WP SCL SDA 1 2 3 4 1 2


    Original     		PDF S-34C02A S-34C02ADIMM WPGND50 00h7Fh 10000hFFh 5000h7Fh S-34C02A0I-T8T1U XC008-A-P-SD-1 S-34C02A XC008-A-R-SD scl4417 XC008

    S-24CS16A

    Abstract: S-24CS16A0I-D8S1G S-24CS16A0I-J8T1G S-24CS16A0I-T8T1G E2PROM16 S24CS16A0IT8T1G 1827 8pin ic
    Text: WP A2 3 6 SCL GND 4 5 SDA 1 S-24CS16A0I-D8S1G VCC , VCC NC 2 7 WP A2 3 6 SCL GND 4 5 SDA 2 S , NC*1 NC*1 A2*2 GND SDA SCL 1 2 3 4 5 6 NC NC*1 A2*2 GND SDA SCL 2 , 8 7 6 5 VCC WP SCL SDA 3 S-24CS16A0I-T8T1G VCC 7 WP GND 8 VCC *1. GNDVCC *2. GND NC NC*1 A2*2 GND SDA SCL 1 2 3 4 5 6 WLP Bottom


    Original     		PDF S-24CS16A S-24CS16A2 E2PROM16 K2048 DP008-F FJ008-A FJ008-D FT008-A FT008-E S-24CS16A S-24CS16A0I-D8S1G S-24CS16A0I-J8T1G S-24CS16A0I-T8T1G S24CS16A0IT8T1G 1827 8pin ic

    2008 - S-24C02CI-J8T1U

    Abstract: S-24C01C1 S-24C02CI-K8T3U S24C02CI-K8T3U S-24C01C s24c01c S-24C01CI-I8T1U S-24C02C 24c01c S-24C01CI-K8T3U
    Text: .5 V 16 400 kHzVCC = 1.6 V5.5 V SCL , SDA 106*125°C 10025°C S-24C01C 1 K S-24C02C 2 K 100 , VCC A1 2 7 WP A2 3 6 SCL GND 4 5 SDA 1 S-24C01CI-J8T1U S-24C02CI-J8T1U A0 1 A1*1 2 A2*1 3 4 GND *1 SDA 5 SCL *1 6 VCC : 7 WP GND : 8 VCC , -24C01CI-T8T1U S-24C02CI-T8T1U 2 VCC WP SCL SDA A0*1 A1*1 A2*1 GND SDA*1 SCL *1 1 2 , Rev.3.0_00_C SNT-8A Top view 3 A0 1 8 VCC A1 2 7 WP 6 SCL 5 SDA A2 3


    Original     		PDF S-24C01C/02C S-24C01C S-24C02C S-24C01CI-J8T1U S-24C02CI-J8T1U FM008-A-P-SD-1 FM008-A-C-SD-1 S-24C02CI-J8T1U S-24C01C1 S-24C02CI-K8T3U S24C02CI-K8T3U s24c01c S-24C01CI-I8T1U 24c01c S-24C01CI-K8T3U

    2009 - 24c32c

    Abstract: s-24c32c 24C64C S-24C64CI-K8T3U3 24C64 24CXX S24C32
    Text: kHzVCC = 1.6 V5.5 V SCL , SDA 106*125°C 10025°C S-24C32C 32 K S-24C64C 64 K 100% Sn 100%*2 *1 , 7 WP A2 3 6 SCL GND 4 5 SDA 1 S-24C32CI-J8T1U3 S-24C64CI-J8T1U3 1 2 3 4 5 6 A0 A1 A2 GND SDA*1 SCL *1 VCC : 7 WP GND : 8 , -24C32CI-T8T1U3 S-24C64CI-T8T1U3 VCC WP SCL SDA 1 2 3 4 5 6 A0 A1 A2 GND SDA*1 SCL *1 7 , Rev.3.0_00_H 3 SNT-8A Top view 3 1 2 3 4 5 6 A0 A1 A2 GND SDA*1 SCL *1


    Original     		PDF S-24C32C/64C S-24C32C/64C2E2PROM32K64 S-24C32C S-24C64C S-24C32CI-J8T1U3 S-24C64CI-J8T1U3 FM008-A-P-SD-1 FM008-A-C-SD-1 24c32c 24C64C S-24C64CI-K8T3U3 24C64 24CXX S24C32

    S-24C02BPPHL

    Abstract: S-24C02BPPHL-TF-G
    Text: 4 1 8 7 6 5 VCC WP SCL SDA 1 NC*1 2 NC*1 3 NC*1 4 GND 5 SDA 6 SCL , 2 CMOS E2PROM S-24C02BPPHL Rev.2.2_00 WP SCL / SDA VCC GND LOAD , 1.0 MHzVCC = 5 V CIN CI /O Min. VIN = 0 VSCLWP VI/O = 0 VSDA Typ , + 1.0 k 20 ns C = 100 pF 3 9 SCL SCL"L" SCL"H" SDA SDA , 1.0 0.3 100 tR SCL tSU.STA tHD.DAT tHD.STA tSU.DAT tSU.STO SDA IN tAA


    Original     		PDF S-24C02BPPHL PH008-A S-24C02BPPHL-TF-G PH008-A-R-SD-1 S-24C02BPPHL S-24C02BPPHL-TF-G

    2006 - Not Available

    Abstract: No abstract text available
    Text: Input / output capacitance Symbol CIN CI / O Condition VIN = 0 V ( SCL , A2, WP) VI / O = 0 V (SDA , signals are processed at the rising or falling edge of the SCL clock input signal, attention should be , protocol. Normal communication cannot be provided without a pull-up resistor. *1. When the SCL input , condition Figure 27 Resetting E2PROM *1. After 9 clocks (dummy clocks), if the SCL clock continues to be , E2PROM S-24CS16A Pin Configurations 8-Pin DIP Top view Pin No. NC NC A2 GND 1 2 3 4 8 7 6 5 VCC WP SCL


    Original     		PDF S-24CS16A S-24CS16A

    2006 - s24cs1

    Abstract: S-24CS16A0I-J8T1G S-24CS16A S-24CS16A0I-D8S1G S-24CS16A0I-J8-T1-G HE006-B
    Text: at the rising or falling edge of the SCL clock input signal, attention should be paid to the rising , be connected to the GND. The write protection is valid in the operating voltage range. tWR SCL , (dummy clocks), if the SCL clock continues to be output without a start condition being input, a write , WP A2 3 6 SCL GND 4 5 SDA Figure 1 S-24CS16A0I-D8S1G 1 2 3 4 5 6 Symbol NC*1 NC*1 A2*2 GND SDA SCL Description No connection No connection TEST pin Ground


    Original     		PDF S-24CS16A S-24CS16A s24cs1 S-24CS16A0I-J8T1G S-24CS16A0I-D8S1G S-24CS16A0I-J8-T1-G HE006-B

    s-24cs04afj-tbh-g

    Abstract: A1-A24 S-24CS01A S-24CS02A S-24CS04A S-24CS08A S-24CS04AFT-TBH-G 08AWP s-24cs02afj-tbhg
    Text: A2 3 6 SCL 2 A1 GND 4 5 SDA 3 4 5 6 A2 GND SDA SCL 7 WP , 1 A0 SCL 2 A1 SDA 3 4 5 6 A2 GND SDA SCL 7 WP 8 VCC A0 , A1 A2 GND 8 7 6 5 1 A0 2 A1 3 4 5 6 A2 GND SDA SCL 7 WP 8 VCC VCC WP SCL SDA 3 S-24CS01AFT-TB-G S-24CS01AFT-TBH-G S-24CS02AFT-TB-G S , A1 A2 GND 1 2 3 4 8 7 6 5 1 A0 2 3 4 5 6 A1 A2 GND SDA SCL 7


    Original     		PDF S-24CS01A/02A/04A/08A S-24CS01A/02A) S-24CS04A/08A) S-24CS01A S-24CS02A S-24CS04A S-24CS08A S-24CS0xAFJ-TBH-G, S-24CS0xAFT-TBH-G s-24cs04afj-tbh-g A1-A24 S-24CS01A S-24CS02A S-24CS04A S-24CS08A S-24CS04AFT-TBH-G 08AWP s-24cs02afj-tbhg

    2012 - S-24C02DI-M5T1U5

    Abstract: S-24C02DI-T8T1U5 S-24C04DI-J8T1U5 24c02d S-24C08DI-M5T1U5 2030 ic 8pin 24C02DI S-24C16DI-T8T1U5 S-24C02DI-I8T1U5 24c08d
    Text: /O capacitance CI /O VIN = 0 V (S-24C02D: SCL , A0, A1, A2, WP) VIN = 0 V (S-24C04D: SCL , A1, A2 , ( SCL , SDA) · Write protect function during low power supply voltage · Endurance: 106 cycle / word*1 (Ta , Diagram Rev.3.0_00_U WP SCL SDA Start / Stop Detector Serial Clock Controller LOAD Device Address , Pin No. 1 2 3 4 5 6 S-24C02D A0 A1 A2 GND SDA*1 SCL *1 Symbol S-24C04D S-24C08D NC*2 NC*2 NC*2 A1 A2 A2 GND GND SDA*1 SDA*1 *1 SCL SCL *1 S-24C16D NC*2 NC*2 NC*2 GND SDA*1 SCL *1 Description


    Original     		PDF S-24C02D/04D/08D/16D S-24C02DI-M5T1U5 S-24C02DI-T8T1U5 S-24C04DI-J8T1U5 24c02d S-24C08DI-M5T1U5 2030 ic 8pin 24C02DI S-24C16DI-T8T1U5 S-24C02DI-I8T1U5 24c08d
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