CHINE TV DATASHEET Search Results

Contextual Info: Lattice i s p L S I ' ;Semiconductor ICorporation a n d p L S I * 1 0 2 4 High-Density Programmable Logic Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — — — — — High-Speed Global Interconnect 4000 PLD Gates 48 I/O Pins, Six Dedicated Inputs

old 14 inch colour tv circuit diagram

Contextual Info: S T 6 3 1 4 0 , S T 6 3 1 4 6 S T 6 3 1 2 6 , S T 6 3 1 5 6 DATASHEET 1st Edition OCTOBER 1993 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED. SGS-THOM SON PR ODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL C OM PONENTS IN LIFE SU PP O R T DEVICES OR S Y S ­

intel 486 dx 33mhz

Abstract: 85C22V10 INTEL 486 Dx processor 01BFFFFFH SX33 486 DX2 component 486 SX
Contextual Info: TECHNICAL PAPER Interfacing the 28F016XS to the Intel486 Microprocessor Family KEN MCKEE TECHNICAL MARKETING ENGINEER PHILIP BRACE APPLICATIONS ENGINEER December 1995 tP> [F3 ® y ST r [ P K E W Q E W Order Number: 297504-003 I 5'25 INTERFACING THE 28F016XS TO THE Intel486™

Contextual Info: ir v tJ . 4-MBIT 256K x 16, 512K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F400BL-T/B, 28F004BL-T/B • Low Voltage Operation for Very Low-Power Portable Applications — Vcc = 3.0V-3.6V Read — Vcc = 3.15V-3.6V Program/Erase ■ SRAM-Compatible Write Interface

app640

Abstract: sgs-thomson power supply
Contextual Info: ST6365, ST6375, ST6385 ST6367, ST6377, ST6387 DATASHEET USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED. SGS-THOM SON PR ODUCTS ARE NOT AUTH O R IZED FOR USE AS C R ITIC AL C OM PONENTS IN LIFE SU PP O R T DEVICES OR S Y S ­ TEM S W ITH O U T TH E EXPRESS W RITTEN A P P R O V A LO F SGS-THOM SON Microelectronics.

IC TB 1237 AN ic working voltage details

Abstract: sda 20560 IC TB 1237 AN st63156 ST63126B1
Contextual Info: 7 S G S -T H O M S O N K lR « I g T O i[ ] ( S S T 6 3 1 4 0 , S T 6 3 1 4 2 i S T 6 3 1 2 6 , S T 6 3 1 5 6 8-BIT HCMOS MCUs FOR TV FREQUENCY & VOLTAGE SYNTHESIS WITH OSD PRELIMINARY DATA • 4.5 to 6V operating Range ■ ■ ■ ■ ■ ■ ■ 8MHz Maximum Clock Frequency

Contextual Info: « F IN A L COM ’L: -15/20 MACHLV210-15/20 Advanced Micro Devices High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC com patible ■ 50 MHz fMAx external — Vcc = +3.0 V to +3.6 V ■ 38 Inputs with advanced pull-up/pull-down

Contextual Info: [» [iS C m Y O !* ] In te l A28F200BX-T/B 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F200BX-T, A28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Optimized High Density Blocked

LED IR for Tx, RX

Contextual Info: ST6391, ST6392, ST6393 ST6395, ST6397, ST6399 DATASHEET USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED. SGS-THOM SON PR ODUCTS ARE NOT AUTH O R IZED FOR USE AS C R ITIC AL C OM PONENTS IN LIFE SU PP O R T DEVICES OR S Y S ­ TEM S W ITH O U T TH E EXPRESS W RITTEN A P P R O V A LO F SGS-THOM SON Microelectronics.

Contextual Info: AdWAKHSS OMF<§»ÄFO [K] in te l A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive • x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs ■ Optimized High Density Blocked

Contextual Info: in te l A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Optimized High Density Blocked Architecture

Contextual Info: Ä E W Ä I M I I O G M f ô K iû Â î r O O M in te i A28F400BX-T/B 4-MBIT 256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Automotive x8/x16 Input/Output Architecture — A28F400BX-T, A28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs

B7C51-1

Abstract: 187C51 87C511 intel 87c51 S7C51 B7C51 80C51 87C51 80C31 intel 87C51 INSTRUCTION SET 80C31 80C31BH
Contextual Info: intel, PWHILDISälONlÄISV 87C51/8 0 C 5 1BH/80C31BH CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Commercial/Express 87C51/80C 51BH/80C51BHP/80C31BH "See Table 1 for Proliferation Options High Performance CHMOS EPROM 5 Interrupt Sources 24 MHz Operation Programmable Serial Port

intel 87c51

Abstract: intel 87C51 INSTRUCTION SET intel P87c51 187C51 270218 270430 80C31 instruction set 87C51-1 270147 87C51
Contextual Info: intel, PWHILDISälONlÄISV 87C51/8 0 C 5 1BH/80C31BH CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Commercial/Express 87C51/80C 51BH/80C51BHP/80C31BH "See Table 1 for Proliferation Options High Performance CHMOS EPROM 5 Interrupt Sources 24 MHz Operation Programmable Serial Port

Contextual Info: intûl * 28F400BX-TL/BL, 28F004BX-TL/BL 4-MBIT 256K x 16,512K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY • Low Voltage Operation for Very Low Power Portable Applications — VCc = 3.3V ±0.3V ■ Automatic Power Savings Feature — 0.8 mA typical Ice Active Current in

80L188EB

Contextual Info: Â W Â K K g i 0K11F@ 1^IM ]Ä?0 K1 in te i 28F200BX-TL/BL, 28F002BX-TL/BL 2 MBIT 128K x 16,256K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY • Low Voltage Operation for Very Low Power Portable Applications — VCC = 3.3V ±0.3V ■ x8/x16 Input/Output Architecture

Contextual Info: O M F ^ ß !M Y []@ N ] in te l 28F400BX-T/B, 28F004BX-T/B 4 MBIT 256K x16,512K x8 BOOT BLOCK FLASH MEMORY FAMILY x8/x16 Input/Output Architecture — 28F400BX-T, 28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs Very High-Performance Read

Contextual Info: in t e i SPECIAL ENVIRONMENT lntel386TM EX EMBEDDED MICROPROCESSOR • Static Intel386 CPU Core — Low Power Consumption — 5V + 5% Operating Power Supply — 25 MHz Operating Frequency ■ Transparent Power-management System Architecture ■ Powerdown Mode

28F400BX-B

Abstract: 28F400BX-T 28F004BX-B 28F004BX-T intel PLD PA28F400BX
Contextual Info: INTEL CORP HENORY/PLD/ SbE D 4fl5bl7L, 007fc.44D 0 2 e! • i ITL2 D K lF O l^ lîü l T rO O M in te l 28F400BX-T/B, 28F004BX-T/B 4 MBIT (256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Very High-Performance Read — 60/80 ns Maximum Access Time — 30/40 ns Maximum Output Enable

290446

Abstract: 29044
Contextual Info: in t e l M ä W A M ! O M F © l^ß !ilÄ T rD @ IM 28F200BX-T/B, 28F002BX-T/B 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY x8/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B — For High Performance and High integration 16-bit and 32-bit CPUs

PA28F400BX-T60

Abstract: 2BF004
Contextual Info: 4-MBIT 256K X 16, 512K X 8 BOOT BLOCK FLASH MEMORY FAMILY 28F400BX-T/B, 28F004BX-T/B m x8/x16 Input/Output Architecture — 28F400BX-T, 28F400BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs • x8-only Input/Output Architecture

317 jrc

Abstract: jrc 317 st6398 IC 317 JRC tea5640 D1313 ST6391 ST6392 ST6393 ST6395
Contextual Info: ST6391, ST6392, ST6393 ST6395, ST6397, ST6399 DATA SHEET 7^2^237 013137^ 3T1 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED. SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYS­ TEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics

RKN8

Abstract: RKN8-L national semiconductor 119285 VIC 1541 disk drive P1596 QR0001 txs-25 vouchers
Contextual Info: PRELIMINARY October 1994 QR0001 QuickRing Data Stream Controller General Description Features QuickRing is a point-to-point data transfer architecture de­ signed to facilitate high speed data streams. The QuickRing architecture can be applied both inside the chassis as well

Contextual Info: inU 28F200BX-T/B, 28F002BX-T/B 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY • x8/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs ■ x8-only Input/Output Architecture