C 3355 TRANSISTOR Search Results

AZ530-08-1

Abstract: az530 5V RELAY diode 310Q CALEX VOLTSENSOR relay 5 V 28V relay McEx TRANSISTOR 4841 10J1
Contextual Info: Model 540 Voltsensor CALEX MANUFACTURING CO SEE 2401 Stanwell Drive, Concord, CA 94520-4841 D • 1011250 000105b 37b « C E X - T 'T 510 687-4411 (800) 542-3355 v s :*» _ FAX: (510) 687-3333 FEATURES • Rugged reliable solid state replacement for meter

Variable resistor 10K ohm pot

Abstract: Variable resistor 1K ohm pot rtd with wheatstone bridge 930/MK296HP hall current transducer 5A TRANSISTOR 4841 trimpot 100 ohm 296HP swinger transistor 930
Contextual Info: CAL EX MANUFACTURING CO 52E D • 1Ô11S5D D0Q1D73 MSS M C E X Constant Current Source 2401 Stanwell Drive, Concord, CA 94520-4841 510 687-4411 (800)542-3355 FAX: (510) 687-3333 'T -S 8 -U -z > FEATURES Program Output by: Potentiometer Setting or Voltage Input

TRANSISTOR k2185

Contextual Info: Model 540 Voltsensor CALEX MANUFACTURING CO SEE 2401 Stanwell Drive, Concord, CA 94520-4841 D 1011250 000105b 510 687-4411 (800)542-3355 37b « C E X FAX: (510) 687-3333 FEATURES • Rugged reliable solid state replacement for meter relays. • Uses almost any power source from +5 to +32V D C

bridge type transducer

Abstract: pressure transducer application Grounded Bridge Power Amplifier schematic circuit diagram rtd pressure instrumentation amplifier circuit temperature sensor using instrumentation amplifier circuit variable dc power supply 3 to 15 volt circuit rtd temperature instrumentation amplifier circuit the Instrumentation amplifier with the bridge type transducer instrumentation amplifier bridge transducer VR103V
Contextual Info: CALEX M A N U F A C T U R I N G CO £ 5 ië < 1B11250 52E D ICEX DD01033 07^ Model 165 Bridgesensor 2401 Stanwell Drive, Concord, CA 94520-4841 510 687-4411 (800)542-3355 FAX: (510) 687-3333 'T '- 7 ! - U ^ 7 FEATURES • No other Function Modules N eed ed . Just Add Power.

Contextual Info: CALEX M A N U F A C T U R I N G CO 52E D • 1 0 1 1 5 5 0 D D D 1 D 7 3 455 « C E X Constant Current Source 2401 Stanwell Drive, Concord, CA 94520-4841 510 687-4411 (800)542-3355 FAX: (510) 687-3333 'T - S 8 - U -Z > FEATURES Program Output by: Potentiometer Setting or Voltage Input

C 3355 transistor

Contextual Info: MC10E131, MC100E131 5V ECL 4-Bit D Flip-Flop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE

C 3355 transistor

Contextual Info: MC10E116, MC100E116 5V ECL Quint Differential Line Receiver The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. For applications which require bandwidths greater than that of the E116, the E416 device may be of interest.

Contextual Info: MC100E241 5V ECL 8-Bit Scannable Register The MC100E241 is an 8-bit shiftable register. Unlike a standard universal shift register such as the E141, the E241 features internal data feedback organized so that the SHIFT control overrides the HOLD/LOAD control. This enables the normal operations of HOLD

Contextual Info: MC10E166, MC100E166 5V ECL 9-Bit Magnitude Comparator The MC10E/100E166 is a 9-bit magnitude comparator which compares the binary value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. The 100 Series contains temperature compensation.

C 3355 transistor

Contextual Info: MC100E310 5V ECL Low Voltage 2:8 Differential Fanout Buffer The MC100E310 is a low voltage, low skew 2:8 differential ECL fanout buffer designed with clock distribution in mind. The device features fully differential clock paths to minimize both device and system

50 ohm resistor

Contextual Info: MC10E101, MC100E101 5V ECL Quad 4-Input OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V • http://onsemi.com

ECL IC NAND

Contextual Info: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

Contextual Info: MC10E155, MC100E155 5V ECL 6−Bit 2:1 Mux−Latch The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with single−ended outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic

socket 775 pinout

Contextual Info: MC10E158, MC100E158 5V ECL 5-Bit 2:1 Multiplexer The MC10E/100E158 contains five 2:1 multiplexers with differential outputs. The output data are controlled by the Select input SEL . The 100 Series contains temperature compensation. • • • • • •

mr 4020

Abstract: MC100E175
Contextual Info: MC10E175, MC100E175 5V ECL 9-Bit Latch With Parity The MC10E/100E175 is a 9-bit latch. It also features a tenth latched output, ODDPAR, which is formed as the odd parity of the nine data inputs ODDPAR is HIGH if an odd number of the inputs are HIGH . The E175 can also be used to generate byte parity by using D8 as the

Contextual Info: MC100E210 5V ECL Dual 1:4, 1:5 Differential Fanout Buffer The MC100E210 is a low voltage, low skew dual differential ECL fanout buffer designed with clock distribution in mind. The device features two fanout buffers, a 1:4 and a 1:5 buffer, on a single chip. The

E212 transistor

Contextual Info: MC10E112, MC100E112 5V ECL Quad Driver The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock

Contextual Info: MC10E154, MC100E154 5V ECL 5-Bit 2:1 Mux-Latch The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on

Contextual Info: MC10E167, MC100E167 5V ECL 6-Bit 2:1 MUX-Register The MC10E/100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 or both . A HIGH on

mr 4020 pin assignment

Abstract: MC100E150
Contextual Info: MC10E150, MC100E150 5V ECL 6-Bit D Latch The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the

Contextual Info: MC10E157, MC100E157 5 V ECL Quad 2:1 Multiplexer The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.

MC100E131

Abstract: MC100E131FN MC100E131FNR2 MC10E131 MC10E131FN MC10E131FNR2
Contextual Info: MC10E131, MC100E131 5V ECL 4-Bit D Flip-Flop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE

Contextual Info: MC10E171, MC100E171 5V ECL 3-Bit 4:1 Multiplexer The MC10E/100E171 contains three 4:1 multiplexers with differential outputs. Separate Select controls are provided for the leading 2:1 MUX pairs see logic symbol . The three Select inputs control which one of the four data inputs in each case is propagated to

C 3355 transistor

Contextual Info: MC10E164, MC100E164 5V ECL 16:1 Multiplexer The MC10E/100E164 is a 16:1 multiplexer with a differential output. The select inputs SEL0, 1, 2, 3 control which one of the sixteen data inputs (A0 − A15) is propagated to the output. Special attention to the design layout results in a typical skew