BUL 128 A Search Results

7555-T

Abstract: M1FM3
Contextual Info: Al t hough we ar e cons t ant l ymak i ng ev er yef f or tt oi mpr ov et he qual i t yand r el i abi l i t yofourpr oduct s ,t her enev er t hel es sr emai nsacer t ai npr obabi l i t yt hatt he s emi conduct orpr oduct smayoccas i onal l yf ai lormal f unct

bul 128 a

Abstract: thomas betts FIBER OPTIC
Contextual Info: ST Single Mode and Multimode Connector System ThomasiBetts ST Connector System Low loss, h ig h ly re p e a ta b le In te rc o n n e c tio n s fo r all ceramic material with a precise radlused endface. This your ST a p p lic a tio n s . enables the Installer to achieve superior return loss and

MLVD047A

Contextual Info: SN65MLVD047A www.ti.com SLLS736A − JULY 2006 − REVISED MAY 2008 MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER FEATURES D Differential Line Drivers for 30-Ω to 55-Ω Loads and Data Rates 1 Up to 200 Mbps, Clock Frequencies up to 100 MHz Supports Multipoint Bus Architectures

Contextual Info: SN65MLVD047A www.ti.com SLLS736A − JULY 2006 − REVISED MAY 2008 MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER FEATURES D Differential Line Drivers for 30-Ω to 55-Ω Loads and Data Rates 1 Up to 200 Mbps, Clock Frequencies up to 100 MHz Supports Multipoint Bus Architectures

405C

Abstract: SN65MLVD047A SN65MLVD047AD
Contextual Info: SN65MLVD047A www.ti.com SLLS736A − JULY 2006 − REVISED MAY 2008 MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER FEATURES D Differential Line Drivers for 30-Ω to 55-Ω Loads and Data Rates 1 Up to 200 Mbps, Clock Frequencies up to 100 MHz Supports Multipoint Bus Architectures

AN2035

Abstract: AN2027 AN2032 AN2033 BAT54 ZL2004 ZL2005 ZL2006 Imax-25
Contextual Info: NLR Configuration for DDC Products Application Note June 01, 2009 AN2032.0 Introduction This application note describes the non-linear response loop that is incorporated in Zilker Labs’ second generation Digital-DC devices. The function and configuration options of this feature

405C

Abstract: SN65MLVD047A SN65MLVD047AD
Contextual Info: SN65MLVD047A www.ti.com SLLS736A − JULY 2006 − REVISED MAY 2008 MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER FEATURES D Differential Line Drivers for 30-Ω to 55-Ω Loads and Data Rates 1 Up to 200 Mbps, Clock Frequencies up to 100 MHz Supports Multipoint Bus Architectures

Contextual Info: & 24LC01B/02B Microchip IK and 2K CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • Single supply with operation down to 2.5 volts • Low power CMOS technology — 1 mA active current typical — 10 |xA standby current typical at 5.5 V — 5 |jA standby current typical at 3.0 V

Contextual Info: M ic r o c h ip 2 4 L C 0 1 B /0 2 B 1K/2K 2.5V CMOS Serial EEPROMs FEATURES PACKAGE TYPE DIP • Single supply with operation down to 2.5V w • Low power CMOS technology - 1 mA active current typical A0 C 1 8 □ Vcc m CM - 10 iA standby current typical at 5.5V

HML 075 IC

Abstract: D3T01
Contextual Info: DS3RT Device DS-3 Line Interface TXC -02001 PRELIMINARY DATA SHEET TranSwitch 1991 FEATURES DESCRIPTION Provides all functionality required to terminate a DS-3 signal: - B3ZS/NRZ decoder - Clock recovery and filter - All line equalization - LOS/LOC detection and AIS

Contextual Info: 24LC01B/02B 1K/2K 2.5V CMOS Serial EEPROMs FEATURES DESCRIPTION • Single supply with operation down to 2.5V • Low power C M O S technology — 1 mA active current typical — 10 iA standby current typical at 5.5V — 5 (iA standby current typical at 3.0V

RAS 0510 SUN HOLD

Abstract: relay ras 1210 sun hold RAS 0510 relay RAS 0510 RAS 0510 SUN HOLD ras 0910 sun hold RAS 0610 ERF 2030 ras 0610 relay 45n03
Contextual Info: Compiled by Herman Boel & James Niven EMWG homepage: www.emwg.info 1998-2005 Preface & Copyright Welcome to the Euro-African Medium Wave Guide What lies in front of you or what you see on your computer screen is the result of a lot of hard work and love.

s11 stopping compound

Abstract: as15 4804B
Contextual Info: LT4420 LT4420 DEVICES INCORPORATED DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ 155 MHz Max Data Rate 312 MHz Max Core Clock Rate 16-bit Data and Coefficients Paths 64-Tap FIR Filter, Cascadable for More Filter Taps Dual 32-Tap Transversal FIR Filter DESCRIPTION

INA230

Contextual Info: INA230 SBOS601 – FEBRUARY 2012 www.ti.com High- or Low-Side Measurement, Bidirectional CURRENT/POWER MONITOR with I2C Interface Check for Samples: INA230 FEATURES DESCRIPTION • • • • The INA230 is a current-shunt and power monitor with an I2C interface that features 16 programmable

INA230

Contextual Info: INA230 SBOS601 – FEBRUARY 2012 www.ti.com High- or Low-Side Measurement, Bidirectional CURRENT/POWER MONITOR with I2C Interface Check for Samples: INA230 FEATURES DESCRIPTION • • • • The INA230 is a current-shunt and power monitor with an I2C interface that features 16 programmable

INA230

Contextual Info: INA230 SBOS601 – FEBRUARY 2012 www.ti.com High- or Low-Side Measurement, Bidirectional CURRENT/POWER MONITOR with I2C Interface Check for Samples: INA230 FEATURES DESCRIPTION • • • • The INA230 is a current-shunt and power monitor with an I2C interface that features 16 programmable

Contextual Info: AMENDMENT AMDB A m 2 8 F 01 0A Data Sheet 1 9 96 Flash P r o d u c t s D ata B o o k / H a n d b o o k INTRODUCTION This amendment supersedes information regarding the Am 28F010A device in the 1996 Flash Products Data Book/Handbook, PI D 11796D. This document includes

l0830

Abstract: LC83010 PGA100 sick acc 18.432MHZ oscillator
Contextual Info: a frJ -K No. EN3606 / No. 3608 LC83010 SA iYO CMOS LSI' AU D IO D IG IT A L SIGNAL PROCESSOR < 1, Overview The LC83010 Is a single-chlp digital signal processor DSP , It is designed for use in the application fields such as a digital processing of audio signals.

Contextual Info: INA226 SBOS547 – JUNE 2011 www.ti.com High-or Low-Side Measurement, Bi-Directional CURRENT/POWER MONITOR with I2C Interface Check for Samples: INA226 FEATURES DESCRIPTION • • • • The INA226 is a current shunt and power monitor with an I2C interface. The INA226 monitors both a

pd6450

Abstract: 6450gt d6450gt 2H23 UPD6450CX-002 4h4 1 JEM AC3 ZT 5551 23hs aros ups circuit
Contextual Info: M O S In te g ra te d C irc u it /¿PD6450 V T R / B 1 2 ir 2 4 # 7 — > • * r \ > =7 <7 9 • CMOS LSI ¿/P D 64 5 0 i , fflC M O S 'rj tmfr&hitXVTR, V T * •T A X ? & K § £ t lz J; 0 , i - L S IT -t o 1 ^ ^ ? 9 ? 12X18 K *y h ^ T " , % T to t t z ,

150131

Abstract: 150014
Contextual Info: PRO CED URE H O U S IN G : DIM. B A 4 I8 I5- N - A N - * * D IM W ITH R AM P 4 I8 I 5 - N - O N - * * ( W IT H O U T RA M P) ¿ .0 5 ) (1 0 .4 1 ) !,002 M IN Û. OR ROU ND “ *

Contextual Info: 4- 21160CBook Page 1 Tuesday, July 7, 1998 4:25 PM M i c r o c h 24LC21A i p IK 2.5V Dual Mode I2C Serial EEPROM FEATURES • Single supply with operation down to 2.5V • Com pletely implements DDC1™/DDC2™ interface for m onitor identification, including

PIC16F89

Abstract: PIC16Fxxx PIC16F86 PIC18F012 PIC16F84A 16 pin ic PIC16F877 LED POTENTIOMETER ADC 24cxx usb programmer TC4469 TC7107 microchip 93LC76
Contextual Info: PRODUCT LINE CARD INCLUDING DEVELOPMENT TOOLS THIRD QUARTER 2001 TELCOM ANALOG PRODUCTS FROM MICROCHIP Thermal Management pages 10-11 Linear pages 19-21 Linear Regulators Op Amps Voltage Output Switching Regulators Comparators Sigma-Delta Logic Output Charge Pump

Contextual Info: 24LCS21 M ic r o c h ip IK 2.5V Dual Mode I2C Serial EEPROM PACKAGE TYPES FEATURES • Completely implements DDC1™/DDC2™ interface for monitor identification • Hardware write-protect pin • Single supply with operation down to 2.5V • Low power CMOS technology