BRQ TI Search Results

QSOP RQ-16

Abstract: INA 701
Contextual Info: Dual, High Speed ECL Comparators ADCMP563/ADCMP564 FUNCTIONAL BLOCK DIAGRAM FEATURES HYS* NONINVERTING INPUT INVERTING INPUT QA 1 16 15 GND 3 LEA 4 LEA 5 VEE 6 –INA 7 +INA 8 14 ADCMP563 BRQ TOP VIEW Not to Scale 13 12 11 10 9 A differential input stage permits consistent propagation delay

brq ti

Contextual Info: CXP80316 SONY» CMOS 8-bit Single Chip Microcomputer Description The CXP80316 is a CMOS 8-bit single chip micro­ computer featuring on-chip integration of serial inter­ face, timer/counter, 16-bit capture timer/counter, time base timer, and vector interruption circuit,

5 pin reset ic ARB

Abstract: 5 pin ic ARB ibm hardware mca
Contextual Info: T /zx.^ MCA 1200 • C Micro Channel* Bus Controller and Local Arbiter September 1988_ Distinctive Features_ Applications_ • Includes logic, high current drivers and buffers for master to Micro Channel* interface in slim 24 pin CMOS DIP

Contextual Info: LG Semicon 4. ELECTRICAL CHARACTERISTICS 4.1. ABOULUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Storage Temperature Symbol Unit Vdd V -0.3 - 7.0 Vi V -0.3 - Vdd+0.3 Tstg °c -4 0 - 125 Ratings 4.2. RECOMMENDED OPERATING CONDITIONS Parameter Symbol

brq ti

Abstract: BRQ TI 7C
Contextual Info: D National November 1995 Semiconductor </> co 00 •Nl cn DS3875 Futurebus+ Arbitration Controller General Description The DS3875 Futurebus+ Arbitration Controller is a member of National Semiconductor’s Futurebus+ chip set designed specifically for the IEEE 896.1 Futurebus+ standard. The

AN2019

Abstract: psoc projects
Contextual Info: Cypress MicroSystems Application Note AN2019 Sleep Operation By: Bert Sullam Associated Project: Yes an2019_5V, an2019_3V Associated Part Family: CY8C25xxx, CY8C26xxx Summary Sleep functionality allows applications to achieve very low average power consumption. This Application

CXP80116

Contextual Info: SONY. _CXP80116 CMOS 8-bit Single Chip Microcomputer Description CXP80116 is a CMOS 8-bit microcomputer which consists of A / D converter, serial interface, tim er/counter, time base timer, vector interruption, high precision timing pattern generation circuit, PWM generator, VTR

Contextual Info: Si GEC PLESSEY ADVANCE INFORMATION S E M I C O N D U C T O R S DS3138-2 1 MV6001 HDLC/DMA CONTROLLER The MV6001 is a combined HDLC transceiver and DMA controller capable of providing serial com munications at rates up to 128K bits/second, and handling direct memory access

JP13

Abstract: JP15 MAX232 MB91360 MB91F361 QFP208 jdh2a D-Sub 25 c4726
Contextual Info: CPU-Modul Documentation  Fujitsu Microelectronics Europe GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag, Germany History Revision V1.0 Date 08.03.01 Comment New Document 2 Warranty and Disclaimer To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts its

ALC020001

Abstract: ALC020002 ALC020003 ALC020004 ALC02004 MB86687A CBS 922
Contextual Info: Deviation List MB86687A Adaptation Layer Controller ALC September 1996 Version 6.0 FML/NPD/ALC/DL/1275 Identification Number ALC020001 Device MB86687A Adaptation Layer Controller ALC Category Rx Message Mode Buffer Allocation Summary If the last cell of an AAL5 packet is received with no data (i.e. pad and trailer) then a

PIR D 203 S

Abstract: BRQ TI 78 RA16 UT69R000 t37h
Contextual Info: Standard Products UT69R000 Rad-Hard MicroController Data Sheet January 1998 q Built-in 9600 baud UART q Full military operating temperature range, -55oC to +125oC, in accordance with MIL-PRF-3853 for Class Q or V q Radiation-hardened process and design; total dose

Contextual Info: Standard Products UT69R000 RadHard MicroController Data Sheet Jan. 1999 q Built-in 9600 baud UART q Full military operating temperature range, -55oC to +125oC, in accordance with MIL-PRF-3853 for Class Q or V q Radiation-hardened process and design; total dose

RIO R47

Contextual Info: GMS81508/16 1. OVERVIEW GMS81508/16 is a single chip microcomputer designed CMOS technology. The use of CMOS process enables extremely low power consumption. This device using the G8MC Core includes several peripheral functions such as Timer, A/D Converter, Programmable Buzzer Driver, Serial I/O, Pulse Width Modulation Function, etc.

A18E

Abstract: A17E BRQ microcontroller pre fetch 1994 multiplex EML BRQ TI 78 TRANSISTOR A18E
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS07-16502-1E 32-Bit Proprietary Microcontroller CMOS FR65E Series MB91301/MB91V301 • DESCRIPTION The MB91301/MB91V301 are a line of microcontrollers based on a 32-bit RISC CPU core FR family , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing

74 HTC 612

Abstract: apl 5915 Z8000 8086 microprocessor block diagrammed with direction Z8052 ZILOG MOUSE CONTROLLER 8086 Minimal mode with 8MHz processor 7 segment display using 8086 CRTC AZ8052
Contextual Info: K h ^ r - Z8052 CRTC Zilog DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION • On-chip DMA capability, operating via iinked-list data structures • Three on-chip row buffers, each 132 characters by 20 bits support split-screen soft-scrolling • General purpose microprocessor interface. Compatible

w02 transistor sot 71

Abstract: uITRON MB91302APFF-G-001-BNDE1 assembler Code Examples i2c avr
Contextual Info: FUJITSU MICROELECTRONICS DATA SHEET DS07-16502-3Ea 32-Bit Proprietary Microcontroller CMOS FR60 MB91301 Series MB91302A/V301A • DESCRIPTION The MB91301 series are a line of microcontrollers based on a 32-bit RISC CPU core FR family , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing of a

1750A processor architecture

Abstract: MIL-STD-1750 MBX R-S t34h FABX
Contextual Info: Standard Products UT1750AR RISC Microprocessor Data Sheet Jan. 1999 FEATURES q Operates in either RISC Reduced Instruction Set Computer mode or MIL-STD-1750A mode q Registers may be in 16-bit word or 32-bit double-word configurations q Supports MIL-STD-1750A 32-bit floating-point

Contextual Info: HD63183— -Document Image Compression and Expansion Processor Advanced ( D IC E P - A HD63183 DICEP-A perform s com pression (encoding) and expansion (decoding) of th e digital (tw o-value) data that rep resen t an im age, and applies DICEP-A to result in an

LED driver 110V

Contextual Info: CY3652 USB Development System User’s Guide Version 1.5 April 17, 1998 Cypress Semiconductor Corp. ✦ 3901 North First Street, San Jose, CA 95134 ✦ Tel: 408 943-6848 ✦ Internet: http://www.cypress.com DOCUMENT HISTORY Document Title: CY3652 USB Development System User’s Guide

assembler Code Examples i2c avr

Contextual Info: FUJITSU MICROELECTRONICS DATA SHEET DS07-16502-5E 32-Bit Proprietary Microcontroller CMOS FR60 MB91301 Series MB91302A/V301A • DESCRIPTION The MB91301 series are a line of microcontrollers based on a 32-bit RISC CPU core FR family , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing of a

assembler Code Examples i2c avr

Abstract: A18E FR60 LQFP-144 MB91301 MB91302A
Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS07-16502-3E 32-Bit Proprietary Microcontroller CMOS FR60 MB91301 Series MB91302A/V301A • DESCRIPTION The MB91301 series are a line of microcontrollers based on a 32-bit RISC CPU core FR family , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing of a

MIL-STD-38510

Abstract: mil-std-1750 T35I XR18 1750a
Contextual Info: Standard Products UT1750AR RadHard RISC Microprocessor Data Sheet November 2000 FEATURES q Operates in either RISC Reduced Instruction Set Computer mode or MIL-STD-1750A mode q Built-in multiprocessor bus arbitration and Direct Memory Access support (DMA)

UT1750AR

Abstract: STD-1750A PIR D 203 S MIL-STD-1750 UTMC Microelectronic Systems
Contextual Info: Standard Products UT1750AR RISC Microprocessor Data Sheet Oct. 1998 FEATURES q Operates in either RISC Reduced Instruction Set Computer mode or MIL-STD-1750A mode q Registers may be in 16-bit word or 32-bit double-word configurations q Supports MIL-STD-1750A 32-bit floating-point

Contextual Info: LG Semicon 3. I/O PORTS There are 7-ports R0~R6 in this device. This ports are double-functional ports and the function can be selected by program. The direction of ports is determined by Port Direction Register.(1=output, 0=input) The data that is written on the programmed output pin is stored in the port data register and is transferred to the