BA 714 M Search Results

Contextual Info: A D V A N C E D E L E C T R O N I C PKG 2bE D • QSS47T3 0000268 4 ■ AEPT/RZ32 32 LINE TRANSCEIVER/REGISTER August 1 ,1 9 9 0 > > 32 bit bus transceiver/register, non-inverting or Inverting. f 3 / > > High density .070 center spaced ZIP leads for maximum

133MHZ

Abstract: UGA2T3242HW-PL
Contextual Info: UGA2T3242HW-PL 4M Bytes 2M x 32 PC133 66 Pin SDRAM DIMM based on 2M x 32 General Description Features The UGA2T3242HW-PL is a 4MBytes high speed Graphics Performance Accelerator (GPA), ideally suited for the 3D graphics applications which require large memory

Contextual Info: ADVANCED EL ECTRONIC P K G atE D m 0 S 5 4 7 ci3 0Q0G2T3 fl • AEPTZ32 32 LINE TRANSCEIVER MODULE August 1, 1990 T -5 a -3 i » 3 2 line bidirectional bus interface » High density ,070 center spaced ZIP leads for maximum I/O in minimum area. » Space saving vertical

Contextual Info: TIEF150, TIEF151, TIEF152 Low-Noise High-Speed Transimpedawce Amplifiers Texas Optoelectronics, Inc. O PTO ELECTRO N IC INTERFACE CIR C U IT S FOR A P P L IC A T IO N S SU C H A S FIBER OPTICS, L A S E R R A N G E F IN D E R S A N D O PTICA L C O M M U N IC A T IO N S

Contextual Info: DENSE-PAC 256 Megabit CMOS DRAM w/ Parity DPD8MX36RKY5 VI i C R O S Y S I’ K M s PRELIMINARY DESCRIPTION: The DPD8MX36RKY5 is the 8 Meg x 36 Dynamic RAM module that utilize the new and innovative space saving TSOP stacking technology. The module is constructed of four 4 Meg x 16 and

dpsd3

Contextual Info: DENSE-PAC / H - 'D éhshs M I C R O S Y S T Ii M S 128 Megabit Synchronous DRAM DPSD32MX4RY5 High Density Memory Device DESCRIPTION: The /H -D tttsus series is a family of interchangeable memory modules. The 128 Megabit SD R A M is a member of this family which utilizes the new and innovative space

Contextual Info: •TOI SPR-1-08/SPR-1-10 Silicon Multi-Channel Detector Array Texas Optoelectronics, inc. DESCRIPTION FEATURES Both the SPR-1-08 and SPR-1-10 are linear arrays of P-ON-N silicon photovoltaic cells. Originally designed for tape and punch cards they find use in many encoding and position

SMT970

Abstract: BSFZ68G62 sharp rf tuners BSFZ68G72 f 9222 l BSFZ68G57 BSFZ68G58 BSFZ68G61 BSFZ68G63 BSFZ68G64
Contextual Info: PRODUCT INFORMATION BSFZ-Series I/Q Output Satellite Tuners FEATURES • • • • • • • • • APPLICATIONS: • Satellite receiver • Data receiver RF Components Group STANDARD BSFZ PACKAGE First LO PLL tuning Low noise figure, 8 dB typical model dependent

Contextual Info: DENSE-PAC 1024 Megabit CMOS DRAM DP3ED32MX32RW VI i ' R O S Y S I H M S PRELIMINARY DESCRIPTION: The DP3ED32MX32RW is the 32 Meg x 32 Dynamic RAM module in the family of modules that utilize the space saving TSOP technology. The module is constructed of sixteen 16M x 4 dynamic RAM surface mounted on an industry standard 72-pin

silicon systems

Contextual Info: SSI 33C3910 ciém sifsim • ATAPI CD ROM Disk Decoder A TDK Group/Company Target Specification January 1995 DESCRIPTION FEATURES The SSI 33C3910 ATAPI CD ROM Disk Decoder is a C M O S m o n o lith ic in te g ra te d c irc u it h o u se d in a 100-Lead Q FP package, and is pin for pin compatible

Contextual Info: The Ketema Rodan KR series of surface mount thermistors are available in a multitude of resistance values ranging from 250 ohms to 150,000 ohms. Just as with the Ketema Rodan NTC disc thermistors, they are suitable for temperature sensing applications over a wide range of resistance values

Contextual Info: 128 Megabit CM O S D DR SDRAM DPDD16MX8RLAY5 DPDD16MX8RSW5 DENSE-PAC MICROSYSTEMS ADVANCED INFORMATION DESCRIPTION: The PL-Sack 9eries is a family of interchangeable memory devices The 128 Megabit Double Data Rate Synchronous D RAM isa member ofth isfam ilyw h ich utilizesthenew and innovative space savingTSOP

rspc decoder byte

Abstract: MN66261 tc9263f cd-rom lg LC7867 SAA7345
Contextual Info: ABRIDGED VERSION SSI 33C3910 óémsuskms ATAPI CD-ROM Disk Decoder A TDK Group/Company Advance Information December 1995 FEATURES DESCRIPTION * ATAPI IDE standard support - Supports CD-ROM disk speeds up to 8X - PIO Host transfers up to 16.6 MB/s - DMA Host transfers up to 16.6 MB/s

119A5

Abstract: A1 D036 DU47
Contextual Info: DENSE-PAC M ICROSYSTEM S 64 Megabyte SDRAM DIMM DPSD8MX64RW DESCRIPTION: PIN-OUT DIAGRAM The JE DEC compatible DPSD8MX64RW is a high speed 64 Megabyte CMOS Synchronous DRAM DIMM, consists of eight 4Mx4x4 SDRAM devices. These modules offer substantial advances in DRAM operating performance, including the

BA1A11

Contextual Info: 128 Megabyte SDRAM SODIMM DENSE-PAC DPSD16MX64RSW5 M I C RO S V S T E M S DESCRIPTION: PIN-OUT DIAGRAM The JE DEC compatible DPSD16MX64RSW5 is a high speed 128 Megabyte CMOS Synchronous DRAM Smaii Outline DIMM utilizing Dense-Pac's new and innovative 3-D space saving

Contextual Info: ZD*A H igh Density, Right Angle D High Density, Economy, .3 5 0 " Footprint Contacts Receptacle Assembly .246 6.25 082(208) Typ GROUNDING HOOKS 2 Places Receptacle 350 1 010 (8.89 ±0.25) 450 ± 010 (11.43 ± 0 25) .550 ±.010 (13.97 ±0.25) PCB Hole Pattern - Page 14-15

Contextual Info: a AM E N D M E N T Advanced Micro Devices Am26LS29 Quad Three-State Single Ended RS-423 Line Driver Publication: Interface Products, PID #04599C Page 4 • Delete “SC" from Valid Combinations Page 5 For Operating Ranges for military paragraph ■ Change Supply Voltage Vcc from +4.75 V to +4.5 V

XFD-4-48

Abstract: 36VA XF-2-10 XF-3-10 XFD-2-12 4-40x1 XF-5-20 XF55
Contextual Info: CHECK IT OUT! wuitu.Kfm rs.com XF SERIES TRANSFORMERS MECHANICAL DIMENSIONS: Xr MRS YlVlW X F -x -x x x NOTE: PINS OM TTED ON 5 NGLE FF?IMARY VERSIONS GENERAL SPECS: - < _F*fViHCF HGUE FO C^IOK^L UIG CCRO. Power Range: 1.1 to 36VA Isolation: 2500Vac Input: 115V single or 115/230V Dual

AX714

Abstract: MAX714
Contextual Info: ADVANCE INFORMATION First P age of D ata Sheet in P reparation B attery-Pow ered Supply S ystem s _ Features ♦ Four L o g ic -C o n tro lled +5V R eg ulators The M AX 716 c o m b in e s circ u itry for four low -d rop out lin­ ear re gulato rs, three D C -D C s w itching regulators, and

Contextual Info: ALLEGRO MICROSYSTEMS INC blE P • D50M33A D00b3fl3 m M W A L G R NPN TRANSISTORS TO-92/TO-226AA W and T F DEVICE TYPES ELECTRICAL CHARACTERISTICS at T. = 25 C V CE ut D C Current Gain 'c B O •c Max. v (BR)CBO V (BR1CEO V (BR)EBO Max. Device Type (mA) (V)

MSM64431

Contextual Info: O K I Semiconductor MSM64431_ Built-in 8-Bit A/D Converter 4-Bit Microcontroller GENERAL DESCRIPTION The MSM64431 is a high-performance 4-bit microcontroller that incorporates OKI's nX-4/20 CPU core. The MSM64431 has a minimum instruction execution time of 714 ns @4.2 MHz and contains a 1024byte program memory, a 64-nibble data memory, four I/O ports (16 bits in total), an 8-bit 4-channel

MAX 7910

Contextual Info: P EN SE - P A C M i c R o s y s i e M /H - D m sm s ^ High Density Memory Module DESCRIPTION: S c î l o s Z 1 2 8 M e g a b it C M O S d r a m PIN-OUT DIAGRAM The/U -D ensus series is a family of interchangeable memory modules. The 64 Megabit DRAM is a member of this family

satellite tuner sharp

Abstract: satellite tuner sharp BSFC sharp rf tuners marshall industries bsf* satellite tuner sharp tuner BSFC77GV6 sharp satellite analog tuner 0438 BSFC77GV8
Contextual Info: PRODUCT INFORMATION BSFC-Series Single Conversion IF Output Satellite Tuner NEW HIGH PERFORMANCE TUNERS WITH VERSATILITY FOR HANDLING ANALOG OR DIGITAL VIDEO. APPLICATIONS: • Satellite receiver • Data receiver • Wide-band front end RF Components Group

NJW1134

Abstract: NJW1134G
Contextual Info: NJW1134 SRS TENTATIVE TM AUDIO PROCESSOR • GENERAL DESCRIPTION ■ PACKAGE OUTLINE The NJW1134 is a sound processor includes both the BBE sound enhancement and SRS 3D-Stereo. It includes all of the functions processing audio signal for TV, such as tone control, balance, volume, mute, and AGC functions.