B0110 Search Results

Contextual Info: Model B0110E50200AHF RevA Ultra Low Profile 1008 Balun 50Ω to 200Ω Balanced Description The B0110E50200AHF is a low profile sub-miniature balanced to unbalanced transformer designed for differential inputs and output locations on next generation digital TV chipsets in an easy to use surface mount

analog kw meter cic circuit diagram

Abstract: 0X070
Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168B1 – MAY 2005 – REVISED MARCH 2006 1 Introduction 1.1 FEATURES • • • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

DS125RT410

Contextual Info: DS125DF410 www.ti.com SNLS398E – JANUARY 2012 – REVISED MAY 2013 DS125DF410 Low Power Multi-Rate Quad Channel Retimer Check for Samples: DS125DF410 FEATURES APPLICATIONS • • 1 2 • • • • • • • • • • • • • • Each Channel Independently Locks to Data

93C46

Abstract: SN11220ACF SS-00259
Contextual Info: Data Sheet USB Audio Controller DATA SHEET SN11220ACF USB Audio Controller V1.01 Copyright 2005, Sonix Technology Co., Ltd. All rights reserved. SN11220ACF Data Sheet USB Audio Controller SN11220ACF I. Description SONiX SN11220ACF is an USB audio controller designed especially for voice-band

Contextual Info: DATASHEET PM PMC-971034 ISSUE 4 PRELIMINARY PMC-Sierra, Inc. PM3390 8 PORT EXACT BUS SWITCHING MATRIX PM3390 8 PORT GIGABIT EXACT BUS SWITCHING MATRIX DATASHEET PRELIMINARY ISSUE 4: JANUARY 1999 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V 7 604.415.6000

H4300

Contextual Info: IEEE-1394 LINK-LAYER CONTROLLER/400M-PHY ONE-CHIP TSB43LV81 SLLS403-December 1999 • • Fully Interoperable with FireWire Implementation of IEEE-1394 1995 and IEEE1394.a compliant Interfaces Directly to Texas Instruments TSB11LV01,TSB21LV03 and TSB41LV0X

relay cross reference

Abstract: sb 050 D 331 CVX marking code diode Y-TEK-2
Contextual Info: PRODUCTION PM* PMC-Sierra, Inc. PM5313 SPECTRA-622 DATASHEET PMC-1981162 ISSUE 6 SONETISDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBITIS PM5313 SPECTRA-622 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S DATASHEET PROPRIETARY AND CONFIDENTIAL PRODUCTION ISSUE 6: SEPTEMBER 2000

bcd to 7 segment converter

Abstract: T-bird traffic light controller vhdl D400 O8 BCD-7SEG vhdl code 16 bit LFSR VHDL code for traffic light controller A71D h0009C Q15T
Contextual Info: APPLICATION NOTE CPLDs Philips Hardware Description Language models of commonly used digital functions Preliminary Programmable Logic Software 1996 Oct 09 Philips Semiconductors Preliminary PHDL models of commonly used digital functions CPLDs INTRODUCTION

P16HD8

Abstract: P16R4 preload decade counter transistor B1010 F159
Contextual Info: Equation and JEDEC Simulators User Manual Table of Contents Preface 1. Equation and JEDEC Simulation Equation and JEDEC File Simulation Test Vector Files . . . . . . . . . . How to Invoke Simulation . . . . The Simulator Model . . . . . . . JEDEC and .tmv Vectors . . . . .

GR-253-CORE

Abstract: IDT77155 IIDT77155 128-PIN AN-173 hecs 50 3rk1
Contextual Info: IDT77155 PHY TC-PMD USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS Integrated Device Technology, Inc. KEY FEATURES • One chip ATM User Network Interface for 155.52 Mbps/ 51.84Mbps operating speed. • Full implementation of the SONET/SDH criteria according

PCMCIA Adapter

Abstract: Altera PCMCIA AMD PCMCIA Flash Memory Card PCMCIA transistor B1010 MACH465 CMD8
Contextual Info: Application Notes Using the M5-256/160 to Implement a PCI to PCMCIA Adapter INTRODUCTION The PCI Bus Standard is a processor independent, high performance local bus interface, that has emerged as an industry standard. PCI local buses are used in many platforms, including

ARM11

Abstract: common features of ARM11 ARM11 processor ARM1136 ARM11 instruction sets ARM1136JF-S ARM1136J-S ETB11
Contextual Info: ARM11 Memory Built-In Self Test Controller Technical Reference Manual Copyright 2003 ARM Limited. All rights reserved. ARM DDI 0289B ARM11 Memory Built-In Self Test Controller Technical Reference Manual Copyright © 2003 ARM Limited. All rights reserved.

Contextual Info: TPS65090A Frontend PMU With Switchmode Charger for 2-3 Cells In Series Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not

12AH, SC SF

Abstract: sad diode marking b12 970133 SDH 209 spectra head 101H 102H 103H 104H 106H
Contextual Info: PM5342 SPECTRA-155 DATA SHEET PMC-970133 ISSUE 4 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER DATA SHEET PROPRIETARY AND CONFIDENTIAL ISSUE 5: AUGUST 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Contextual Info: W90P710CD/W90P710CDG 32-BIT ARM7TDMI-BASED MCU W90P710CD/W90P710CDG 16/32-bit ARM microcontroller Product Data Sheet -1- Publication Release Date: July 07, 2005 Revision A.3 W90P710CD/W90P710CDG Revision History REVISION DATE COMMENTS A 2005/12/02 Draft A.1

K241

Abstract: K-241 gxb tx_coreclk P802
Contextual Info: 5. XAUI Mode SGX52005-1.2 Introduction The 10 Gigabit Attachment Unit Interface XAUI is an optional, self-managed interface that can be inserted between the reconciliation sublayer and the PHY layer to transparently extend the physical reach of the 10 Gigabit Media Independent Interface (XGMII).

VGA TO AV CONVERTER

Abstract: M5 DIODE 22-35 fuse n15 2 way video splitter circuit diagram 8 channel audio amplifier circuit diagram adcb 27 ADT1-1WT introduction of automatic phase selector FUSE MARKING AA3 cdma power meter block diagram
Contextual Info: www.ti.com AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS168B1 – MAY 2005 – REVISED MARCH 2006 1 Introduction 1.1 FEATURES • • • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC

UG331

Abstract: CWda04 XAPP256 manual SPARTAN-3 XC3S400 evaluation kit vhdl code for rs232 receiver hcl l21 usb power supply circuit diagram hcl p38 CIRCUIT diagram R80515 XC3SD1800A-FG676 vhdl ethernet spartan 3a
Contextual Info: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.6 December 3, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

BYt 32

Contextual Info: 11 AM SONET/SDH PATH TERMINATING TRANSCEIVER TELECOM STANDARD PRODUCT DATASHEET be r, 20 05 12 :5 9: PM5344 es da y, 1 3D ec em SPTX DATA SHEET ISSUE 7: NOVEMBER 2005 Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n Tu SONET/SDH PATH TERMINATING

eye-q 400

Abstract: tx2/rx2 XAUI OC48 altgx
Contextual Info: 5. Stratix IV Dynamic Reconfiguration SIV52005-3.1 Stratix IV GX and GT transceivers allow you to dynamically reconfigure different portions of the transceivers without powering down any part of the device. This chapter describes and provides examples about the different modes available for

Contextual Info: Speedster22i 10/40/100 Gigabit Ethernet User Guide UG029 – September 6, 2013 UG029, September 6, 2013 1 Copyright Info Copyright 2013 Achronix Semiconductor Corporation. All rights reserved. Achronix is a trademark and Speedster is a registered trademark of Achronix Semiconductor Corporation.

0100S

Contextual Info: PHY TC-PMD USER NETWORK INTERFACE FOR 155 MBPS ATM NETWORK APPLICATIONS KEY FEATURES • One chip ATM User Network Interface for 155.52 Mbps/ 51.84Mbps operating speed. • Full implementation of the SONET/SDH criteria according to Bellcore GR-253-CORE and ITU-T G.709, G.783.

ic 381

Abstract: 147il dmo 365 rn Ic 384
Contextual Info: áç XRT7250 PRELIMINARY DS3/E3 FRAMER IC OCTOBER 2000 REV. P1.0.7 GENERAL DESCRIPTION The XRT7250 DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an “outbound” DS3/E3 Data Stream. Further, the Framer

transistor B1010

Abstract: 7705 reset B1-110 DRAM controller 74F244 74F257 DA10 I960 MC88915 iFX780
Contextual Info: A AP-703 APPLICATION NOTE DRAM Controller for 33 MHz i960 CA/CF Microprocessors Sailesh Bissessur SPG EPD 80960 Applications Engineer Intel Corporation Embedded Processor Division Mail Stop CH5-233 5000 W. Chandler Blvd. Chandler, Arizona 85226 February 2, 1995