AXI COMPLIANT DDR3 CONTROLLER Search Results

rk3188

Abstract: RK3188-T ARGB888 emmc boot sequence
Contextual Info: RK3188Technical Reference ManualRev 1.2 Chapter 1 Introduction RK3188 is a low power, high performance processor for mobile phones, personal mobile internet device and other digital multimedia applications, and integrates quad-core Cortex-A9 with separately NEONand FPU coprocessor.

XA7Z020

Abstract: CLG225 XA7Z020-1CLG484I UG585 HSTL RGMII XA7Z010 Z-7010 ZYNQ-7000 AMBA AXI dma controller designer user guide Z-7020
Contextual Info: XA Zynq-7000 All Programmable SoC Overview DS188 v1.0 October 15, 2012 Advance Product Specification XA Zynq-7000 All Programmable SoC First Generation Architecture The XA Zynq -7000 Automotive family is based on the Xilinx All Programmable SoC architecture. These

FBG676

Abstract: XC7A200T-2-FBG676
Contextual Info: Artix-7 FPGA AC701 Evaluation Kit Vivado Design Suite 2012.4 Getting Started Guide UG967 (v1.0) January 10, 2013 0402936-01 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum

zynq axi ethernet software example

Abstract: XC7Z020 AMBA AXI dma controller designer user guide ZYNQ-7000 Xilinx Z-7020 DDR3L lpddr2 axi compliant ddr3 controller XC7Z100 XC7Z010 xc7z030
Contextual Info: Zynq-7000 All Programmable SoC Overview DS190 v1.3 March 15, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core

Contextual Info: Defense-grade Zynq-7000Q All Programmable SoC Overview DS196 v1.0 November 22, 2013 Preliminary Product Specification Defense-grade Zynq-7000Q All Programmable SoC First Generation Architecture The Defense-grade Zynq -7000Q family is based on the Xilinx All Programmable SoC architecture. These products integrate a

Contextual Info: Defense-grade Zynq-7000Q All Programmable SoC Overview DS196 v1.1 June 18, 2014 Preliminary Product Specification Defense-grade Zynq-7000Q All Programmable SoC First Generation Architecture The Defense-grade Zynq -7000Q family is based on the Xilinx All Programmable SoC architecture. These products integrate a

ZYNQ-7000

Abstract: xc7z020 zynq axi ethernet software example AMBA AXI dma controller designer user guide axi interface ddr3 memory controller ARm cortexA9 GPIO Z-7045 FFG676 xc7z030 LPDDR2 1Gb Memory xilinx DDR3 controller user interface
Contextual Info: Zynq-7000 All Programmable SoC Overview DS190 v1.2 August 21, 2012 Advance Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core

UG585

Abstract: CLG225 ZYNQ-7000 zynq7000
Contextual Info: Zynq-7000 All Programmable SoC Overview DS190 v1.5 September 3, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core

Contextual Info: Zynq-7000 All Programmable SoC Overview DS190 v1.6 December 2, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core

Z-7020

Contextual Info: Zynq-7000 All Programmable SoC Overview DS190 v1.4 August 6, 2013 Preliminary Product Specification Zynq-7000 All Programmable SoC First Generation Architecture The Zynq -7000 family is based on the Xilinx All Programmable SoC architecture. These products integrate a feature-rich dual-core

Contextual Info: XA Zynq-7000 All Programmable SoC Overview DS188 v1.1 June 4, 2014 Advance Product Specification XA Zynq-7000 All Programmable SoC First Generation Architecture The XA Zynq -7000 Automotive family is based on the Xilinx All Programmable SoC architecture. These

M2S050-1FG484I

Abstract: M2s010-fgg484 axi interface ddr3 memory controller M2S050-FG484 M2S050T-1FG484I M2S120T-1FC1152I SECDED M2S005-VF400 M2S010T-FGG484 M2S050T-FG896
Contextual Info: Product Brief SmartFusion2 System-on-Chip FPGAs Microsemi’s SmartFusion 2 SoC FPGAs integrate fourth generation flash-based FPGA fabric, an ARM® Cortex -M3 processor, and high performance communications interfaces on a single chip. The SmartFusion2 family is the industry’s lowest power, most

Contextual Info: Product Brief IGLOO2 FPGAs Microsemi’s IGLOO 2 FPGAs integrate fourth generation flash-based FPGA fabric and high-performance communications interfaces on a single chip. The IGLOO2 family is the industry’s lowest power, most reliable and highest security programmable logic

T3150

Contextual Info: Transcede 3xxx Wireless Base Station System on Chip Data Sheet 843xx-DSH-001-A October 2013 Contents Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

FO-10GGBLCX20-001

Abstract: DX58SO asus rampage
Contextual Info: Kintex-7 FPGA Connectivity Kit Getting Started Guide UG929 v1.0 June 26, 2012 XPM0402915-01 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum

axi compliant ddr3 controller

Abstract: M85000 arm cortex a9 comcerto cortex a9 "ARM Cortex A9" CORTEX-A9 mindspeed 484 dyna image DDR31200
Contextual Info: Product Brief M85000 – Comcerto 5000 Media Convergence Processor > Product Overview High Performance Voice and Video Stream Processing for NGN and IMS IP and IP/TDM Networks Mindspeed’s flagship Comcerto® 5000 Media Processing SoC and production software is the ideal solution for processing Voice-over-IP and Video-over-IP media

MS2025

Abstract: M2S150
Contextual Info: Product Brief SmartFusion2 System-on-Chip FPGAs Product Brief Microsemi’s SmartFusion 2 SoC FPGAs integrate fourth generation flash-based FPGA fabric, an ARM® Cortex -M3 processor, and high-performance communications interfaces on a single chip. The SmartFusion2 family is the industry’s lowest power, most

Contextual Info: W TECHNICAL PRODUCT BRIEF The OCT2224W System-on‐Chip devices are very low‐power, high‐performance multi‐core DSPs, coupled with an optional ARM11 processor and a complete software development suite. OCT2224W Features

QSFP28 I2C

Contextual Info: Arria 10 Device Overview 2013.09.04 AIB-01023 Subscribe Feedback Altera’s Arria FPGAs and SoCs deliver optimal performance and power efficiency in the midrange. By using TSMC's 20-nm process technology on a high-performance architecture, Arria 10 FPGAs and SoCs

Achronix Semiconductor

Contextual Info: I Speedster22i HD FPGA Family DS004 Rev. 2.6 – May 8, 2014 Preliminary Highlights • • • Advanced highest-density and highest‐bandwidth FPGA • Over 1.7 million effective look‐up‐tables • Abundant embedded hard IP for communica‐

Contextual Info: Arria V Device Overview 2013.05.06 AV-51001 Subscribe Feedback The Arria V device family consists of the most comprehensive offerings of mid-range FPGAs ranging from the lowest power for 6 gigabits per second Gbps and 10 Gbps applications, to the highest mid-range FPGA

Contextual Info: Cyclone V Device Overview 2013.05.06 CV-51001 Subscribe Feedback The Cyclone V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and

ARm cortexA9 GPIO

Abstract: arm cortex a7 mpcore AV-51001 cortex-a9 M10K fd7k interlaken network processor D5250
Contextual Info: Arria V Device Overview 2013.01.11 AV-51001 Subscribe Feedback The Arria V device family consists of the most comprehensive offerings of mid-range FPGAs ranging from the lowest power for 6 gigabits per second Gbps and 10 Gbps applications, to the highest mid-range FPGA

Contextual Info: Cyclone V Device Overview 2013.12.26 CV-51001 Subscribe Send Feedback The Cyclone V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and