ATES Search Results

Contextual Info: SN54HC00, SN74HC00 QU AD R U PLE 2 INPUT POSITIVE-NAND G ATES D 2 6 8 4 . DECEMBER 1 9 8 2 -R E V IS E D M ARC H 1 9 8 4 S N 54H C 00 SN 74H C 00 TO P V IE W 1AC IB C 2 1Y0 3 2AÊ 4 Dependable Texas Instruments Quality and Reliability Th ese devices co n tain four in dependent 2 -in p u t

47d-15

Contextual Info: STP3020 S un M ic r o e l e c t r o n ic s July 1997 SMC System Memory Controller DATA SHEET D e s c r ip t io n The STP3020 System M em ory controller SMC interfaces to an array of DRAM and VRAM SIMM s. It acceler­ ates graphics and im aging to m ain memory and fram e buffers. It also provides the interface for video I/O

SO-140

Abstract: DN74LS12
Contextual Info: DN74LS1 2 LS TTL DN74LS Series DN74LS12 T rip le 3 - input P o sitiv e NAND G ates with Open C ollector Outputs • Description P-1 DN 74LS12 contains three 3-input positive isolation NAND gate circuits w ith open collector outputs. ■ Features • •

DN74LS22

Contextual Info: DN74LS22 LS T TL DN74LS Series DN74LS22 Dual 4 - input P o sitiv e NAND G ates with Open C ollector Outputs P-1 • Description DN 74LS22 contains tw o 4-input positive isolation NAND gate circuits w ith open collector outputs. ■ Features • • • •

74LS series logic gates

Abstract: 74LS series logic gates 3 input or gate buffer 74ls series logic gates MN74HC51 MN74HC51S
Contextual Info: High-Speed CMOS Logic MN74HC Series M N 7 4 H C 5 1 M MN74HC51 /MN74HC51S N 7 4 H C 5 IS Dual A N D -O R Invert G ates • Description P-1 M N 74HC51/M N 74HC5IS contain tw o AND-OR-INVERT ates. A doption o f a silicon gate CMOS process has resulted in low

DN74LS51

Contextual Info: DN74LS51 LS T T L DN74LS Series DN74LS51 2 - wide 3-input, 2 - wide 2 - input A N D -O R -IN V E R T G ates P-1 • Description D N 74L S 51 c o n ta in s tw o 2 -in p u t an d tw o 3 -in p u t A N D -O R IN V E R T ates. ■ Features • • • • Low p o w e r c o n su m p tio n Pd = 5.5m W ty p ic a l

Contextual Info: samîec EH T-105- 01- S -D -S M Mated withTCSD E HT—120-01 -S -D -S M { 2 .0 0 m m } .0 7 8 7 " p itc h SPE C IFIC A T IO N S Materials: Insulator Material: M ates : T O B la c k L iq u id C ry s ta l P o ly m e r Terminal Material: P h o s p h o r ESronze

Contextual Info: samiec T M M -110-01 -T -D -S M • v » T M M -112-01-G-.H5—SM T M M -1 3 0 -0 5 -L -S -S M IMS0 S P E C IF IC A T IO N S M ates v-rsih: nf Materials: {2 ,00m m ' Insulator Material: Black Liquid Crystal Polymer Terminal Material: Phosphor B 'onze Current Rating:

Contextual Info: F -1 9 9 -1 am tec 1MT-10-05—F—D-A 1M T -20-05-L-D -A 1M T-30-05-F-D U 1 ,0 0 m m . (1,00mm) .0 3 9 4 ' S P E C IF IC A T IO N S M ates w ith : 1M F Materials: Optional Alignment Pins In su lator Material: Natural L CP T erm inal M aterial: P h o sph cr Bronze

i-089

Abstract: TSW B-3N-C-LFS
Contextual Info: amîec BOX CON M ates vith : TSW, r ITSW. LCW BST TSS, Z 3S. DW. EW. ZW, Hw, t : m . m t l w NO. PINS PER ROW I bcsH 22^ PLATING OPTION Features: -s I _ 10 j" (0,25pim Gold on Contact, 'L . 200|i" (5,08|Jm) Tin on tail • Low profile box m nn n n to r = Single

Contextual Info: F-199-• m slâm lëc TW -08-09—G -T -2 5 0 —205 TW—16-06—S —D—800-100 TW -16-12-T-S-700-310 2mm BO S P E C IF IC A T IO N S Materials: Insulator Material: Specify stacker height in 0 ,13mm .006“ increments M ates w ith : CLT. S Q T .S Q W .E S Q T .

Contextual Info: ^ it f Ê samTÊc F' 199' 1 • FH P-15-01-T-S FHP-12—02-T—S M ates with: Surface Mount or Through-Hole FW J, H F W J, JW Insulator M aterial: Black LCP Contact M aterial: Phosphor Bronze Plating: Sn over 50n" 1 ,27nm Ni Insertion Depth: (2,62m m ) .103" to

Contextual Info: E E AREA A S 3SS Materials: M ates w ith : CSB Insulator Material: Black Liquid Crystal Polymer Terminal Material: Phosphor Bronze Current Rating: 2A @ 80°C ambient Operating Temp Range: -65°C tc +125°C Plating Au over 50n" 1,27|im Ni (1,27mm) .050 Processing:

Contextual Info: F-1" - 1 m s a rn le c M LE -115-01-G -D V M LE-120-01-G -O V M LE-140-01-G -DV ir r STANDA I i- r 1 , 1,00mm .0394 Tiger B eam contact L . M ates w ith : FTM. FTMH. MW Materials: I Id eal for pass-through applications In s u la to r M a te ria l: B la c k L iq u id C ry s ta l P o ly m e r

Contextual Info: Dual 3 - input 3 -o u tp u t NOR G ates • P IN ARRANGEMENT I CIRCUIT SCHEMATIC T op View IDC CHARACTERISTICS Item S upply C u r r e n t V e e = - 5.2V, Symbol 7 a = - 3 0 ~ + 8 5 “C ) T e s t C ondition I ee typ max Unit - - 38 mA IlH V,h- - 0 .8 1 0 V

17R-HH2

Abstract: trasformer TWIN TRIODE V7000 CATHODE13 Scans-0017315
Contextual Info: 17R-HH2 MEDIUM -MU T W IN TRIODE 17R HH2 is a high-m u tw in converter and oscillator of th e form er-less FM /A M receivers. ates well a t low plate voltage, receivers. BASE triode designed for use as a R F amplifier, frequency V HF band. T h is tube is used in tu n ers of tra n s­

Contextual Info: ICS90C64A Integrated Circuit Systems, Inc. Dual Video/M em ory Clock Generator Introduction Features The Integrated Circuit Systems ICS90C64A is a dual clock generator for VGA applications. It simultaneously gener­ ates two clocks. One clock is for the video memory, and the

Contextual Info: 6N135 6N136 Infineon technology High-Speed 2.5 kV TRIOS Optocoupler FEATURES Is o la tio n T est V oltage: 2500 V RMS T T L C o m p a tib le Dimensions in inches mm] H igh B it R ates: 1.0 M b it/s H igh C o m m o n -M o d e In te rfe re n c e Im m u n ity

DN74LS09

Contextual Info: I LS TTL DN74LS Series DN74LS09 DN74LS09 Quad 2 - input P o sitiv e AND G ates with Open C ollector Outputs P -1 • Description D N 7 4 L S 0 9 c o n ta in s fo u r 2 -in p u t p o sitiv e iso la tio n A N D g ate c irc u its w ith o p e n c o lle c to r o u tp u ts .

DN74LS02

Contextual Info: I LS TTL DN74LS Series DN74LS02 DN74LS02 Quad 2 - input P o sitiv e NOR G ates • Description DN74LS02 contains four 2-input positive isolation NOR gate circuits. ■ • • • • P-1 Features Low power consumption P,j = 1 lmW typical High speed ( tpd = 10ns typical)

MN4000B

Abstract: MN4000BS
Contextual Info: PANASONIC IN D L/E LE K -CIO bb D Ë | b ^ E flS S CMOS Logic MN4000B Series 6932852 PANASONIC INOL*ELECTRONIC 0004^24 7 AAN4000B/MN4000BS 6C 0 Í9 2 4 D 7=V3-2/ MN4000B/MN40Ô0BS Dual 3-Input NOR G ates and Inverters • Description P-1 The M N 4000B /S are dual 3-input NOR gate and inverters.

DN74LS27

Abstract: MA161
Contextual Info: LS TTL DN74LS Series DN74LS27 D N 74L S 2 7 bf0 7 d.LSQ.-j T rip le 3 -input P ositive NOR G ates • Description P-1 D N 74L S27 contains three 3-input positive isolation NOR gate circuits. I Features • • • • Low power consum ption P d = 13.5m W typical

mitsubishi fx

Abstract: M51923 M51923FP M51923P
Contextual Info: MITSUBISHI LINEAR ICs> M51923P,FP DUAL COMPARATOR DESCRIPTION PIN CONFIGURATION (TOP VIEW The M 51923 is a dual (two independent) com parator and oper­ ates over a w ide voltage range from a single supply voltage. The M 51923 has a characteristic of low power dissipation but

R56j

Contextual Info: 2 . E lec tric al i . M e c h a n ic a l S p e c if ic a t io n s :@ 2 5 ° C INDUCTANCE: Û.56uH Q: 15 Min ±5% @25MHz @25MHz A DC RESISTANCE: 1 .0 5 OHMS M axim um 1.6±0.2 SRF: 170MHz CN Ö Idc: 10 0 m A Max ÛQ -H □0 Ö IN d ü -H V/. N ates: DO O J