AT40206 PERIPHERAL CONTROLLER Search Results

8254 aa

Contextual Info: AT40206 Features • Fully Compatible with PC/AT Architecture • Fully Compatible with B237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and 146818 Real-Time Clock • Provides 7 DMA Channels, 13 Interrupt Request Channels, 2 Timer/Counter Channels, and a Real-Time Clock

Contextual Info: AT40206 Features • • • • • • • • • Fully Compatible with PC/AT Architecture Fully Compatible with 8237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and 146818 Real-Time Clock Provides 7 DMA Channels, 13 Interrupt Request Channels,

8254 TIMER

Abstract: 74ls612 IR012 8259 Programmable Interrupt Controller file 8259 pin diagram Block Diagram of 8237 74612 pin diagram 8259 8237 DMA Controller 8259
Contextual Info: AT40206 Features • • • • • • • • • Fully Compatible with PC/AT Architecture Fully Compatible with 8237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and 146818 Real-Time Clock Provides 7 DMA Channels, 13 Interrupt Request Channels,

74ls612

Abstract: 8237 DMA Controller Block Diagram of 8237 pin diagram 8259 memory mapper atmel 932 8259 8259 pin diagram 8254 TIMER pin diagram of 8237
Contextual Info: AT40206 Features • • • • • • • • • Fully Compatible with PC/AT Architecture Fully Compatible with 8237 DMA Controller, 8259 Interrupt Controller, 8254 Timer/Counter, and 146818 Real-Time Clock Provides 7 DMA Channels, 13 Interrupt Request Channels,

AT40391B25

Abstract: 80386DX 16 BIT AMI 8042 AT40391B-40
Contextual Info: AT40391B/392 Features • Two-Chip PC/AT Compatible Chip Set for 80386DX Systems Operating up to 40 MHz AT40391B System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Walt State Cache Read Hit and Programmable 0/1 Wait State

CACHE MEMORY FOR 80386DX

Abstract: 80386DX C9012 386DX 386DX bios 386DX motherboard 80387DX Cache Controller 80386DX 16 BIT
Contextual Info: AT40391B/392 Features • Two-Chip PC/AT Compatible Chip Set for 80386DX Systems Operating up to 40 MHz AT40391B System and Cache Controller AT40392 Data Buffer Controller Two 160-Pin Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Walt State Cache Read Hit and Programmable 0/1 Wait State

Programmable logic controller

Contextual Info: AT40493/392 Features • • • • • • • • • • • • • • • • • • • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pin Quad Flatpacks

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Abstract: Atmel 122 m019 M-022 80486 set
Contextual Info: b4E D • 1 0 7 4 17 7 GüD3fiüb 0=14 ■ A T M ATME L CORP ^ m "m I AT40493/392 Features • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller • Two 160-Pin Quad Flatpacks

73d25

Abstract: at40206 peripheral controller
Contextual Info: AT40493/392 Features • • • • • • • • • • • • • • • • • • • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pin Quad Flatpacks

memory interface 80386dx 16 bit

Abstract: 386DX bios 80387DX 80386DX 16 BIT 73d25 md25g AT40391B-40
Contextual Info: AT40391B/392 Features • Two-Chip PC/AT Compatible Chip Set for 80386DX Systems Operating up to 40 MHz AT40391B System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Wait State Cache Read Hit and Programmable 0/1 Walt State

Contextual Info: AT40493/392 Features • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Wait State Cache Read Hit and Programmable 0/1 Wait State

80486 interface with keyboard

Abstract: m027 80486 m029 laptop motherboard block diagram AT40493 8042 Keyboard Controller M010 RAM Cache control logic burst controller coprocessor
Contextual Info: AT40493/392 Features • Two-Chip PC/AT Compatible Chip Set «or 80486 Based Systems Operating up to 50 MHz AT40493 System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Wait State Cache Read Hit and Programmable 0/1 Walt State

block diagram of bios

Abstract: dram Memory Controller 25 Mhz bus ISA 80386SX 80386sx core logic
Contextual Info: AT40283 Features • One-Chip PC/AT Compatible Core Logic Controller for 80386SX Systems operating up to 33 MHz • One 160-Pin Quad Flatpack, 1-Micron CMOS Technology • CPU Interface and ISA Bus Control • Numeric Co-processor Support • OS/2 Alternate Hot Reset Support

Contextual Info: AT40491/2 Features • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems of up to 33 MHz AT40491 System Controller AT40492 Data Buffer Controller Two 160-Pin Quad Flatpacks, 1-Micron CMOS Process On-Chip Support For Direct-mapped Copy-back Cache Supports 2,1,1,1 and 3,1,1,1 Cache Burst Cycles