ASSEMBLY INSTRUCTION DOC Search Results

Contextual Info: in y CHAPTER 6 INSTRUCTION SET REFERENCE This chapter provides detailed information about each instruction available to the i960 Jx processors. Instructions are listed alphabetically by assembly language mnemonic. Format and notation used in this chapter are defined in section 6.1, “NOTATION” pg. 6-1 .

Contextual Info: IBM041841WLAD IBM043641WLAD Preliminary 128K x 36 & 256K x 18 SRAM Features • 128K x 36 or 256K x 18 Organizations • CMOS Technology • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Single Ended Pseudo-PECL Clock compatible with LVTTL Levels

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 3 RELEASED FOR PUBLICATION 2 - LOC ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. REVISIONS DIST 6 AJ LTR H 1 . H 111 D I I / \ USE DESCRIPTION PER EC O S 14 - 0 2 3 7 - 0 4 INSTRUCTION DATE DWN APVD 10JAN05

Contextual Info: IBM041841QLAD IBM043641QLAD P relim inary 128K x 36 & 256K x 18 SR A M Features • 128K x 36 or 256K x 18 Organizations • Registered Outputs • CMOS Technology • Common I/O • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Asynchronous Output Enable and Power Down

Contextual Info: SM320F2810-EP, SM320F2811-EP, SM320F2812-EP SM320C2810-EP, SM320C2811-EP, SM320C2812-EP Digital Signal Processors Data Manual Literature Number: SGUS051A March 2004 − Revised October 2004 This document contains information on products in more than one phase of

Contextual Info: intei 1.0 Data Sheet — 80960RM About this Document This is the Advance Information data sheet for the 80960RM processor. This data sheet contains a functional overview, mechanical data package signal locations and simulated thermal characteristics , targeted electrical specifications (simulated), and bus functional waveforms.

Contextual Info: SN74LVTH18502AĆEP, SN74LVTH182502AĆEP 3.3ĆV ABT SCAN TEST DEVICES WITH 18ĆBIT UNIVERSAL BUS TRANSCEIVERS SCAS744A − DECEMBER 2003 − REVISED JUNE 2004 D Controlled Baseline D D D D D D D D UBT  Universal Bus Transceiver − One Assembly/Test Site, One Fabrication

Intel overdrive

Contextual Info: in t e i Intel486 SX M ICROPROCESSOR IM PORTANT— Read This Section Before Reading The Rest Of The Data Sheet This data sheet describes the Intel486 SX microprocessor, the Intel OverDrive™ Processor, and the l n t e l 4 8 7 TM S X Math Coprocessor. All normal text describes the functionality for the Intel486 SX microproces­

CNF11

Contextual Info: TMS320F206 DIGITAL SIGNAL PROCESSOR SPRS050A – NOVEMBER 1996 – REVISED APRIL 1998 D D D High-Performance Static CMOS Technology Includes the T320C2xLP Core CPU TMS320F206 is a Member of the TMS320C20x Generation, Which Also Includes the TMS320C203, and

Contextual Info: SM320C32−EP DIGITAL SIGNAL PROCESSOR SGUS038 - AUGUST 2002 D Controlled Baseline D D D D D D D D D D D D D SMJ320C30 and SMJ320C31 Object Code - One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of -55 °C to 125°C Enhanced Diminishing Manufacturing

SE370C6C2A

Abstract: 4-bit even parity checker circuit diagram XOR RA31-0
Contextual Info: TMS370CxCx 8-BIT MICROCONTROLLER SPNS040B – NOVEMBER 1995 – REVISED FEBRUARY 1997 D D D D D D D JD AND N PACKAGES TOP VIEW VCC D3 / SYSCLK D6 A7 XTAL2 / CLKIN XTAL1 A6 A5 A4 A3 A2 D7 A1 A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20

SE370C6C2A

Contextual Info: TMS370CxCx 8-BIT MICROCONTROLLER SPNS040B – NOVEMBER 1995 – REVISED FEBRUARY 1997 D D D D D D D JD AND N PACKAGES TOP VIEW VCC D3 / SYSCLK D6 A7 XTAL2 / CLKIN XTAL1 A6 A5 A4 A3 A2 D7 A1 A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20

SPRC191

Abstract: SPRU430D
Contextual Info: TMS320F2808, TMS320F2806 TMS320F2801, UCD9501 Digital Signal Processors Data Manual Literature Number: SPRS230F October 2003 – Revised September 2005 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas

TMS320C2

Contextual Info: SMJ320F240 DSP CONTROLLER SGUS029C − APRIL 1999 − REVISED SEPTEMBER 2004 D Processed to MIL-PRF-38535 QML D High-Performance Static CMOS Technology D Includes the T320C2xLP Core CPU D D − Object Compatible With the TMS320C2xx Family − Source Code Compatible With

tms 9937

Contextual Info: TMS320C40 DIGITAL SIGNAL PROCESSOR SPRS038 – JANUARY 1996 D D D D D D D D D D D D D D Highest Performance Floating-Point Digital Signal Processor DSP – ’320C40-60: 33-ns Instruction Cycle Time, 330 MOPS, 60 MFLOPS, 30 MIPS, 384M Bytes / s – ’320C40-50:

Contextual Info: SM320C6202ĆEP FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SGUS044–JULY 2003 D Controlled Baseline D D D D D D D D D D 3M-Bit On-Chip SRAM – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 105°C Enhanced Diminishing Manufacturing

Contextual Info: Intel 80960CA-33, -25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR • Two Instructions/Clock Sustained Execution • Four 59 Mbytes/s DMA Channels with Data Chaining • Dem ultiplexed 32-bit Burst Bus with Pipelining • 32-bit Parallel Architecture — Two Instructions/clock Execution

Contextual Info: SM320VC5510A-EP Fixed-Point Digital Signal Processor Data Manual Literature Number: SGUS045A August 2003 − Revised November 2003 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

SE370C756A

Abstract: SE370C758B TMS370C756A
Contextual Info: TMS370Cx5x 8-BIT MICROCONTROLLER SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997 D D D D D D D D D FN / FZ PACKAGE TOP VIEW VSS1 C2 C1 MC C0 B7 B6 B5 B4 B3 B2 B1 B0 D0 / CSE2 / OCF VCC2 VSS2 VCC1 CMOS/EEPROM/EPROM Technologies on a Single Device – Mask-ROM Devices for High-Volume

aeha

Abstract: MSC1212Y2
Contextual Info: MSC1211, MSC1212 MSC1213, MSC1214 SBAS323E − JUNE 2004 − REVISED FEBRUARY 2006 Precision AnalogĆtoĆDigital Converter ADC and DigitalĆtoĆAnalog Converters (DACs) with 8051 Microcontroller and Flash Memory FEATURES ANALOG FEATURES D 24 Bits No Missing Codes

SI3016

Contextual Info: TMS320C54V90 EMBEDDED V.90 MODEM DSP SPRS165F − JULY 2001 − REVISED OCTOBER 2003 D Provides Two-Chip Modem Solution D Data Rates from 300 bps to 56 Kbps D Data Modulation Standards D V.90, V.34, V.32bis, V.32, V.22bis, V.22, V.23, V.21 and V.23 Reversible Minitel , Bell 212,

Contextual Info: TMS320C6418 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS241D August 2004 − Revised January 2006 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

MAR105 wireless

Contextual Info: TMS320C6414T, TMS320C6415T, TMS320C6416T FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS SPRS226F − NOVEMBER 2003 − REVISED MARCH 2005 D Highest-Performance Fixed-Point DSPs D D D D D − 1.67-/1.39-/1.17-/1-ns Instruction Cycle − 600-/720-/850-MHz, 1-GHz Clock Rate

Contextual Info: TMS320C6414, TMS320C6415, TMS320C6416 FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS146N − FEBRUARY 2001 − REVISED MAY 2005 D Highest-Performance Fixed-Point Digital D D D D D Signal Processors DSPs − 2-, 1.67-, 1.39-ns Instruction Cycle Time − 500-, 600-, 720-MHz Clock Rate