AS2 DSP Search Results

EE-263

Abstract: ADSP-TS201 k2236 r25 q radix 2 FFT source code for ts201 26R2-5 64 point FFT radix-4 mlx15
Contextual Info: Engineer-to-Engineer Note a EE-263 Technical notes on using Analog Devices DSPs, processors and development tools Contact our technical support at dsp.support@analog.com and at dsptools.support@analog.com Or visit our on-line resources http://www.analog.com/ee-notes and http://www.analog.com/processors

DS2165Q

Contextual Info: DS2165Q 16/24/32kbps ADPCM Processor www.maxim-ic.com § § § § § § § § § § § Compresses/expands 64kbps PCM voice to/from either 32kbps, 24kbps, or 16kbps Dual fully independent channel architecture; device can be programmed to perform either: - two expansions

DS2165

Abstract: DS2165QL DS2167 DS2165Q
Contextual Info: DS2165/DS2165Q 16/24/32kpbs ADPCM Processor www.dalsemi.com PIN ASSIGNMENT FEATURES § § § § § § § § § § RST TM0 TM1 A0 A1 A2 A3 A4 A5 SPS MCLK 1 2 3 4 5 6 7 8 9 10 11 12 VSS VDD YIN CLKY FSY YOUT CS SDI SCLK XOUT FSX CLKX 24 23 22 21 20 19 18 17

DS1231

Abstract: DS2164Q DS2165 HD44238C
Contextual Info: DS2164Q DS2164Q G.726 ADPCM Processor PIN ASSIGNMENT • Compresses/expands • Dual, fully independent channel architecture; device can be programmed to perform either: – two expansions – two compressions – one expansion and one compression TM1 TM0

DS1231

Abstract: DS2164Q DS2165 HD44238C
Contextual Info: DS2164Q DS2164Q G.726 ADPCM Processor PIN ASSIGNMENT • Compresses/expands • Dual, fully independent channel architecture; device can be programmed to perform either: – two expansions – two compressions – one expansion and one compression TM1 TM0

Contextual Info: DS2164Q DALLAS SEMICONDUCTOR DS2164Q G.726 ADPCM Processor FEATURES PIN ASSIGNMENT • Compresses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps as per the CCITT/ ITU G.726 specification T- o *Q £ 5 5 B 1 U Ü Î _i I—I—ICC Z > >- O

Contextual Info: DALLAS SEMICONDUCTOR FEATURES DS2164Q G.726 ADPCM Processor PIN ASSIGNMENT • C om presses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps as per the CCITT/ ITU G.726 specification • Dual, fully independent channel architecture; device

itt 3906

Abstract: DS2165 DS2167 DS2165Q
Contextual Info: DALLAS D S 2 1 6 5 /D S 2 1 6 5 Q 16/24/32Kbps ADPCM Processor s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • Compresses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps 24 ] 23 ] YIN TM1 C 3 22 ] CLKY RST [ • Dual, fully independent channel architecture; device

DS2165Q

Contextual Info: “ m m c o m m c tm DS2165/DS2165Q 16/24/32kpbs ADPCM Processor PIN ASSIGNMENT FEATURES • Compresses/expands 64 kbps PCM voice to/from either 32 kbps, 24 kbps, or 16 kbps ■ Dual, fully independent channel architecture; device can be programmed to perform either:

DS2165Q

Contextual Info: D A LLA S s e m ic o n d u c to r DS2165/DS2165Q 16/24/32Kbps ADPCM Processor PIN ASSIGNM ENT FEATURES • Compresses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps • Dual, fully independent channel architecture; device can be programmed to perform either:

DS2165Q

Contextual Info: D S 2165/D S2165Q DALLAS SEMICONDUCTOR D S 2 1 6 5 /D S 2 1 6 5 Q 16/24/32Kbps ADPCM Processor PIN ASSIGNMENT FEATURES • Compresses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps • Dual, fully independent channel architecture; device

8 bit booth multiplier

Abstract: block diagram 8 bit booth multiplier modified booth circuit diagram 8 bit modified booth multiplication circuit multiplier accumulator MAC implementation using "saturation arithmetic"
Contextual Info: SECTION 3 DATA ALU MOTOROLA DATA ALU 3-1 SECTION CONTENTS 3.1 3.1.1 3.1.2 3.1.3 3.1.3.1 3.1.3.2 3.1.3.3 3.1.3.4 3.1.4 3.1.5 3.1.6 3.1.6.1 3.1.6.2 3.2 3.2.1 3.2.2 3.2.3 3.2.4 3.2.5 3.2.5.1 3.2.5.2 3-2 OVERVIEW AND ARCHITECTURE . . . . . . . . . . . . . . . . . . . . . . . . . .

DS1231

Abstract: DS2165 DS2165QL DS2167 HD44238C DS2165Q
Contextual Info: DS2165/DS2165Q DS2165/DS2165Q 16/24/32Kbps ADPCM Processor PIN ASSIGNMENT • Compresses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps RST 1 24 VDD TM0 2 23 YIN TM1 3 22 CLKY A0 4 FSY A1 5 21 20 A2 6 19 CS A3 7 18 SDI A4 8 9 17 SCLK SPS

32 bit booth multiplier for fixed point

Abstract: bit 3252 block diagram 8 bit booth multiplier ASR16 DSP56100 modified booth circuit diagram 8 bit adder parallel multiplier MAC code using modified Booth multiplier accumulator MAC implementation using "saturation arithmetic"
Contextual Info: Freescale Semiconductor, Inc. SECTION 3 Freescale Semiconductor, Inc. DATA ALU MOTOROLA DATA ALU For More Information On This Product, Go to: www.freescale.com 3-1 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. SECTION CONTENTS 3.1 3.1.1 3.1.2

as15 G

Abstract: as15 h AS15 U IS82C600 TB001
Contextual Info: TARGET SPECIFICATION TrailBlazer ISSI ISSI ® Integrated Silicon Solution, Inc. TARGET SPECIFICATION TRAILBLAZER IS82C600 — Virtual Dual-Port SRAM GENERAL DESCRIPTION The TrailBlazer Virtual Dual Port VDP SRAM simplifies DSP-based system design and layout,

Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR 4 -

AS15 G IC

Contextual Info: IS82C600 TRAILBLAZER ADVANCE INFORMATION APRIL 1998 Virtual Dual-Port SRAM FEATURES • Virtual Dual-Port VDP SRAM • Seamless interface to Texas Instrum ents’ TMS320LC5X and TMS320LC54x high-speed DSPs • Zero wait-state performance up to 133 MHz on

as15 G

Abstract: IS82C600 IS82C600-7B IS82C600-7BI AS15 timing AS15 U AS15 -f
Contextual Info: IS82C600 IS82C600 TRAILBLAZER ADVANCE INFORMATION APRIL 1998 Virtual Dual-Port SRAM FEATURES • Virtual Dual-Port VDP SRAM • Seamless interface to Texas Instruments’ TMS320LC5x and TMS320LC54x high-speed DSPs • Zero wait-state performance up to 133 MHz on

Contextual Info: PACE1750AE SINGLE CHIP, 20MHz to 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip PACE TechnologyTM CMOS 16-Bit Processor with 32 and 48-Bit Floating Point Arithmetic Form-Fit-Functionally Compatible with the

as3 SMD Transistor

Abstract: IB435 AK010 mil-std-1750 PACE1750A PACE1750AE P1750A mil-std-1750a smd ak3
Contextual Info: PACE1750AE SINGLE CHIP, 20MHz to 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip PACE TechnologyTM CMOS 16-Bit Processor with 32 and 48-Bit Floating Point Arithmetic Form-Fit-Functionally Compatible with the

Contextual Info: TMP141 SBAS347 − MARCH 2005 Digital Out Temperature Sensor with Single-Wire SensorPath Bus FEATURES D D D D D D D D DESCRIPTION SensorPath INTERFACE FOUR ADDRESSES RESOLUTION: +0.25°C 10-bit WIDE TEMPERATURE RANGE: −40°C to +125°C LOW QUIESCENT CURRENT: 110µA (typ)

104C

Abstract: T141 T14G TM141 TMP141 TMP141AIDBVR TMP141AIDBVT TMP141AIDGKR TMP141AIDGKT T-14G
Contextual Info: TMP141 SBAS347 − MARCH 2005 Digital Out Temperature Sensor with Single-Wire SensorPath Bus FEATURES D D D D D D D D DESCRIPTION SensorPath INTERFACE FOUR ADDRESSES RESOLUTION: +0.25°C 10-bit WIDE TEMPERATURE RANGE: −40°C to +125°C LOW QUIESCENT CURRENT: 110µA (typ)

Contextual Info: IS82C600 TRAILBLAZER P R E L IM IN A R Y J A N U A R Y 1999 High-Speed SRAM with Address Decoding and Ready Logic FEATURES • Zero wait-state performance on the Primary Bus — Point-to-point interface between the SRAM and the high-speed processor • Features Address Decoding and Ready Logic

Contextual Info: TMP141 SBAS347 − MARCH 2005 Digital Out Temperature Sensor with Single-Wire SensorPath Bus FEATURES D D D D D D D D DESCRIPTION SensorPath INTERFACE FOUR ADDRESSES RESOLUTION: +0.25°C 10-bit WIDE TEMPERATURE RANGE: −40°C to +125°C LOW QUIESCENT CURRENT: 110µA (typ)