ARCH1998 Search Results
ARCH1998 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: M O S E L V IT E L IC V53C316165A 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 50 60 Max. RAS Access Tim e, tpj^c 50 ns 60 ns Max. Column Address Access Time, (tcAA) 25 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tpc) 20 ns |
OCR Scan |
V53C316165A 16-bit cycles/64 42-pin 50/44-pin 6165A | |
433.92MHz loop antenna design
Abstract: VC01
|
OCR Scan |
KESRX01 460MHz DS3968 arch1998 KESRX01 50Kbits/sec 433.92MHz loop antenna design VC01 | |
Contextual Info: M O S E L V IT E L IC V53C516165A 5 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 50 60 Max. RAS Access Tim e, tpj^c 50 ns 60 ns Max. Column Address Access Time, (tcAA) 25 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tpc) 20 ns 25 ns |
OCR Scan |
V53C516165A 16-bit cycles/64 42-pin 50/44-pin 16165A 50/44-Pin | |
Contextual Info: M O S E L V IT E L IC V53C518160A 1M x 16 FA S T PA G E M O D E CM O S DYNAM IC R A M HIGH PERFORMANCE 50 60 Max. RAS Access Tim e, tpj^c 50 ns 60 ns Max. Column Address Access Time, (tcAA) 25 ns 30 ns Min. Fast Page Mode Cycle Time, (tpc) 35 ns 40 ns Min. Read/W rite Cycle Time, (tpc) |
OCR Scan |
V53C518160A 16-bit cycles/16 42-pin 44/50-pin |