ALVCH374 Search Results

A115-A

Abstract: C101 SN74ALVCH374 SN74ALVCH374N
Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

Contextual Info: OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS DESCRIPTION: FEATURES: - ALVCH374 ADVANCE INFORMATION 0.5 MICRON CMOS Technology Typical ts K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; 25 mil pitch SSOP, QSOP and TSSOP Packages

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

Contextual Info: 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FE A T U R E S : - 0.5 MICRON CMOS Technology - Typical tSK o (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

A115-A

Abstract: C101 SN74ALVCH374 SN74ALVCH374N 74ALVCH374
Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

A115-A

Abstract: C101 SN74ALVCH374 SN74ALVCH374N 74ALVCH374
Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

VB374

Abstract: A115-A C101 SN74ALVCH374 SN74ALVCH374N
Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

IDT74ALVCH374

Contextual Info: ALVCH374 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH374 DESCRIPTION: FEATURES: This octal postive edge-triggered D-type flip-flop is built using advanced

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

A115-A

Abstract: C101 SN74ALVCH374 SN74ALVCH374N VB374
Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES118F – JULY 1997 – REVISED JANUARY 2003 D D D D D D DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

IDT74ALVCH374

Abstract: DSC 5D
Contextual Info: ALVCH374 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE INDUSTRIAL TEMPERATURE RANGE ALVCH374 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – 0.5 MICRON CMOS Technology

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

74ALVCH374

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

Contextual Info: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V

IDT74ALVCH374

Abstract: DSC 5D
Contextual Info: ALVCH374 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – ALVCH374