AD28MSP02 Search Results

Contextual Info: AD28MSP02BR Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0 Minimum Operating Temp (øC)-40 Maximum Operating Temp (øC)85 Package StyleSO Mounting StyleS Pinout Equivalence Code28-583 # Pins28 Ckt. (Pinout) NumberLN02800583 DescriptionVoiceband Signal Port

4th-order elliptic high pass filter

Abstract: C1672 ADSP-2101 ADSP-2105 ADSP-2111 SSM2141
Contextual Info: Voiceband Signal Port AD28msp02 a FEATURES Complete Analog I/O Port for Voiceband DSP Applications Linear-Coded 16-Bit Sigma-Delta ADC Linear-Coded 16-Bit Sigma-Delta DAC On-Chip Anti-Aliasing and Anti-lmaging Filters On-Chip Voltage Reference 8 kHz Sampling Frequency

Contextual Info: AD28MSP02KN Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0 Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code24-566 # Pins24 Ckt. (Pinout) NumberLN02400566 DescriptionVoiceband Signal Port

Contextual Info: AD28MSP02KR Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0 Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleSO Mounting StyleS Pinout Equivalence Code28-583 # Pins28 Ckt. (Pinout) NumberLN02800583 DescriptionVoiceband Signal Port

Contextual Info: AD28MSP02BN Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0 Minimum Operating Temp (øC)-40 Maximum Operating Temp (øC)85 Package StyleDIP Mounting StyleT Pinout Equivalence Code24-566 # Pins24 Ckt. (Pinout) NumberLN02400566 DescriptionVoiceband Signal Port

Contextual Info: AN ALO G DEVICES □ Linear Codec AD28msp02 FEATURES Complete Linear Coded Codec 16-Bit Sigma-Delta ADC 16-Bit Sigma-Delta DAC On-Chip Antialiasing and Anti-Imaging Filters On-Chip Voltage Reference 8 kHz Sampling Frequency Twos Complement Coding 65 dB SNR and THD

Contextual Info: ANALOG DEVICES Mixed-Signal Processor with Host Interface Port ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

MIPS26

Abstract: adsp21msp59 HA20 27C512 DIL
Contextual Info: A N A LO G ► D E V IC E S FEATURES 38 ns Instruction Cycle Tim e 26 MIPS from 13.00 MHz Crystal ADSP-2100 Family Code and Function Com patible w ith N ew Instruction Set Enhanced for Bit Manipulation Instructions, M ultiplication Instructions, Biased Rounding, and Global Interrupt Masking

TSE 4041

Abstract: ADSP-21msp56a PGA300 msp50 ADSP-21msp55A ADSP-21msp50 001C 27C64 80C51 HA20
Contextual Info: ► ANALOG DEVICES Mixed-Signal Processor with Host Interface Port ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

GSM0610

Abstract: Voice Activity Detector ARSA 2A00 ADSP-2100 ADSP-2101 ADSP-2111 ADSP-2171 GSM0632 ADSP210x
Contextual Info: GSM Codec 4.1 4 OVERVIEW This chapter describes the implementation of the Pan-European Digital Mobile Radio DMR Speech Codec Specification 06.10. This code was developed in accordance with the recommendation of the Conference of European Post and Telecommunications’ (CEPT) Group Special Mobile

mark sheet format 10th

Contextual Info: ANALOG DEVICES FEATURES Complete Analog I/O Port for Voiceband DSP Applications Linear-Coded 16-Bit Sigma-Delta ADC Linear-Coded 16-Bit Sigma-Delta DAC On-Chip Anti-Aliasing and Anti-Imaging Filters On-Chip Voltage Reference 8 kHz Sampling Frequency Twos Complement Coding

RDD 17-33

Abstract: HAD70 001C 27C128 27C256 27C512 27C64 80C51 ADSP-2100 ADSP-2101
Contextual Info: a FEATURES 38 ns Instruction Cycle Time 26 MIPS from 13.00 MHz Crystal ADSP-2100 Family Code and Function Compatible with New Instruction Set Enhanced for Bit Manipulation Instructions, Multiplication Instructions, Biased Rounding, and Global Interrupt Masking

Contextual Info: ANALOG ► DEVICES FEATURES Complete Analog I/O Port for Voiceband DSP Applications Linear-Coded 16-Bit Sigma-Delta ADC Linear-Coded 16-Bit Sigma-Delta DAC On-Chip Anti-Aliasing and Anti-Imaging Filters On-Chip Voltage Reference 8 kHz Sampling Frequency Twos Complement Coding

Contextual Info: □ ANALOG DEVICES Mixed-Signal Processors with Host Interface Ports ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM IK Words of On-Chip Data Memory RAM

ADSP-21MSP50A

Contextual Info: ANALOG DEVICES Mixed-Signal Processors with Host Interface Ports ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

Cii 60

Abstract: em 231 rtd AD677 ADC71
Contextual Info: Selection Trees — Analog-to-Digital Converters A/D CONVERTERS FAST SAR < MSPS FASTER SUBRANGING (> 1 MSPS < 20 MSPS) FASTEST FLASH (> 20 MSPS) SPECIAL FUNCTION AUDIO/STEREO CODECS I/O PORTS SIGMA-DELTA SINGLE SUPPLY DAS* FUNCTION * DAS = Data Acquisition System: MUX, T /H & A/D

ilc7660

Abstract: SSM2126a max1440 AD698 AD633 application notes LM35 application circuits with OP07 AD1671 evaluation board ADDS-2101-EZ-LAB ssm-2126A AD7874
Contextual Info: SHORT FORM "ROAD MAP" PRECISION LINEAR GENERAL PURPOSE PRECISION LINEAR APPLICATION SPECIFIC OP AMP OVERVIEW P-2 OVERVIEW (P-18) Analog Computation (P-12) ATE (P-19) COMMUNICATIONS APPLICATION SPECIFIC OVERVIEW (P-18) Audio Sample Rate Converters (P-40)

VC20

Abstract: Digital Voice Systems
Contextual Info: Digital Voice Systems, Inc. The Speech Compression Specialists VC-20 Serial Speech Data Interface Application Note Version 1.2 Nov, 2002 VC-20 - Serial Speech Data Interface VC-20 - Serial Speech Data Interface DIGITAL VOICE SYSTEMS, INC. The Speech Compression Specialists

TSE 4041

Abstract: IMX17 144 PGA AS C2 DAB Clock Radio service manual
Contextual Info: ANALOG DEVICES Mixed-Signal Processor with Host Interface Port ADSP-21 msp50A/55A/56A FEATURES 77 ns Instruction Cycle Time from 13.00 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Words of On-Chip Data Memory RAM

ADSP21MSP55ABS52

Abstract: 001C 80C51 ADSP-2100 ADSP-2101 ADSP-2111 ADSP-21msp56a a10gno
Contextual Info: ANALOG DEVICES Mixed-Signal Processors with Host Interface Ports □ ADSP-21 msp50A/55A/56A F EA T U R ES 77 ns Instruction Cycle Tim e from 13.00 MHz Crystal ADSP-2100 Fam ily Code & Function Com patible 2K W ords of On-Chip Program Memory RAM IK W ords of On-Chip Data M emory RAM

RTD 2533

Abstract: ad79024 AD7580 ad7902 em 231 rtd ADC912 AD ADC80-12 DAS1153 ADC71
Contextual Info: Selection Tree A/D Converters ANALOG-TO-DIGITAL CONVERTERS AD9014 10 MSPS *Flash A D C s generally do not require a T/H 2-3 ro Selection Tree A/D Converters 100 kSPS < fs < 1 MSPS1 1 (J.S < t f ] O N V ~ with T/H without T/H* 8-Bit 12-Bit 8-Bit AD7820 AD7569