AD183X CODEC Search Results

Contextual Info: 2 ADC, 8 DAC, 96 kHz, 24-Bit ⌺-⌬ Codec AD1837 Silicon Anomaly Sheet This document details known bugs in the current version of the AD1837. Analog Devices, Inc. is committed, through future silicon revisions, to continuously improve silicon functionality.

AD1838

Abstract: AD1838A TDM256
Contextual Info: 2 ADC, 8 DAC, 96 kHz, 24-Bit ⌺-⌬ Codec AD1838 Silicon Anomaly Sheet This document details known bugs in the current version of the AD1838. Analog Devices, Inc. is committed, through future silicon revisions, to continuously improve silicon functionality.

AD1835

Abstract: AD1835A TDM256 AD183x codec
Contextual Info: 2 ADC, 8 DAC, 96 kHz, 24-Bit ⌺-⌬ Codec AD1835 Silicon Anomaly Sheet This document details known bugs in the current version of the AD1835. Analog Devices, Inc. is committed, through future silicon revisions, to continuously improve silicon functionality.

TDM256

Abstract: AD1837 AD1837A analog phase shift Single R-S-T Flip-Flop
Contextual Info: 2 ADC, 8 DAC, 96 kHz, 24-Bit ⌺-⌬ Codec AD1837 Silicon Anomaly Sheet This document details known bugs in the current version of the AD1837. Analog Devices, Inc. is committed, through future silicon revisions, to continuously improve silicon functionality.

AD1839

Abstract: AD1839A TDM256
Contextual Info: 2 ADC, 8 DAC, 96 kHz, 24-Bit ⌺-⌬ Codec AD1839 Silicon Anomaly Sheet This document details known bugs in the current version of the AD1839. Analog Devices, Inc. is committed, through future silicon revisions, to continuously improve silicon functionality.

Contextual Info: a SHARC Processor ADSP-21375 Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data SIMD computational architecture On-chip memory—0.5M bit of on-chip SRAM and a dedicated

ADSP-21160

Abstract: ADSP-21161 ADSP-21364 hardware design for DC MOTOR SPEED CONTROL USING
Contextual Info: SHARC Processor ADSP-21364 Preliminary Technical Data SUMMARY Code compatible with all other members of the SHARC family The ADSP-21364 is available in a 300 MHz core instruction rate. For complete ordering information, see Ordering Guide on page 43 High performance 32-bit/40-bit floating point processor

Contextual Info: SHARC Processor ADSP-21267 Preliminary Technical Data SUMMARY DAI incorporates two Precision Clock Generators PCG , and an Input Data Port (IDP) that includes a Parallel Data Acquisition Port (PDAP), and three programmable timers, all under software control by the Signal Routing Unit (SRU)

ADSP21267

Abstract: ADSP-21267
Contextual Info: SHARC Processor ADSP-21267 Preliminary Technical Data SUMMARY DAI incorporates two precision clock generators PCG , and an input data port (IDP) that includes a parallel data acquisition port (PDAP), and three programmable timers, all under software control by the signal routing unit (SRU)

IIR SIMD

Abstract: ADSP-21365 CP-1201 ADSP-21160 ADSP-21161
Contextual Info: SHARC Processor ADSP-21365 Preliminary Technical Data SUMMARY On-chip memory—3 Mbits of on-chip SRAM and a dedicated 4 Mbits of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21365 is available in a 300 MHz core instruction

ADSP2116x

Abstract: AD150 n08 SMD AD183x
Contextual Info: a SHARC Processor ADSP-21363 SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21363 is available with a 333 MHz core instruction rate. For complete ordering information, see Ordering

Contextual Info: a SHARC Processor ADSP-21368 Preliminary Technical Data SUMMARY Code compatible with all other members of the SHARC family The ADSP-21368 is available with a 400 MHz core instruction rate with unique audio centric peripherals such as the Digital Audio Interface, S/PDIF transceiver, serial ports, 8channel asynchronous sample rate converter, precision

smd w04 77

Abstract: smd B07 P03
Contextual Info: a SHARC Processor ADSP-21367 Preliminary Technical Data SUMMARY Single-instruction multiple-data SIMD computational architecture On-chip memory—2M bit of on-chip SRAM and a dedicated 6M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family

AD150

Abstract: AES EBU CONVERTER
Contextual Info: a SHARC Processor ADSP-21364 SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21364 is available with a 333 MHz core instruction rate and unique audiocentric peripherals such as the digital audio interface, S/PDIF transceiver, serial ports, 8channel asynchronous sample rate converter, precision

Contextual Info: SHARC Processor ADSP-21371/ADSP-21375 SUMMARY DEDICATED AUDIO COMPONENTS High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data SIMD computational architecture On-chip memory, ADSP-21371—1M bits of on-chip SRAM

A24PX

Abstract: ADSP-21160 ADSP-21161 ADSP-21375
Contextual Info: a SHARC Processor ADSP-21375 Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data SIMD computational architecture On-chip memory—0.5M bit of on-chip SRAM and a dedicated

ADSP-21160

Abstract: ADSP-21371 ADSP-21375 CP-1201
Contextual Info: a SHARC Processor ADSP-21371 Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data SIMD computational architecture On-chip memory—1M bit of on-chip SRAM and a dedicated

AD183x

Contextual Info: a SHARC Processor ADSP-21363 Preliminary Technical Data SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21363 is available with a 333 MHz core instruction

ADSP-21363

Abstract: ADSP-21160 ADSP-21161 ADSP21363 pcb thermal Design guide trace theta layout
Contextual Info: a SHARC Processor ADSP-21363 Preliminary Technical Data SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21363 is available with a 333 MHz core instruction

ADSP-21160

Abstract: ADSP-21161 ADSP-21364 CP-1201 ADSP-21364SBSQZENG tbdm
Contextual Info: a SHARC Processor ADSP-21364 Preliminary Technical Data SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21364 is available with a 333 MHz core instruction

ADSP-21362KBC

Abstract: L05 SMD 4604 inverter A08 smd transistor bottle counter IEEE format transistor SMD n03 ADSP-21160 ADSP-21161 ADSP-21362 CP-1201
Contextual Info: a SHARC Processor ADSP-21362 SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance automotive audio processing Single-instruction, multiple-data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM

ADSP-21367

Abstract: ADSP-21368 CP-1201
Contextual Info: a SHARC Processor ADSP-21368 Preliminary Technical Data SUMMARY Single-Instruction Multiple-Data SIMD computational architecture On-chip memory—2M bit of on-chip SRAM and a dedicated 6M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family

Contextual Info: a SHARC Processor ADSP-21362 Preliminary Technical Data SUMMARY High performance 32-bit/40-bit floating-point processor optimized for high performance automotive audio processing Single-Instruction Multiple-Data SIMD computational architecture On-chip memory—3M bit of on-chip SRAM

interrupts for ADSP21369

Abstract: control registers for ADSP-21369 JC JB jt boot kernel for the ADSP-21369 AD183x ADSP-21369
Contextual Info: a SHARC Processor ADSP-21369 Preliminary Technical Data SUMMARY The ADSP-21369 is available with a 400 MHz core instruction rate with unique audio centric peripherals such as the Digital Audio Interface, S/PDIF transceiver, serial ports, 8channel asynchronous sample rate converter, precision