A5 CHIP Search Results

SiB4500BDY

Abstract: IDTP9035 OM350 PJ-018AH 6.3h 250v C2012X5R1E106M 60014f NQG48 WT-5050 32 pins tqfn 5x5 footprint
Contextual Info: Single-Chip 5V Wireless Power Transmitter IC for TX-A5 and A11 Product Datasheet IDTP9035 Features Description 5W Solution for Wireless Power Consortium WPC -compliant power transmitter design A5/A11 Conforms to WPC specification version 1.1 specifications

dfn8 tray

Contextual Info: Single-Chip 5V Wireless Power Transmitter IC for TX-A5 and A11 Product Datasheet IDTP9035A Features Description 5W Solution for Wireless Power Consortium WPC -compliant power transmitter design A5/A11 Conforms to WPC specification version 1.1 specifications

cortex-a5 processor

Abstract: cortex-a5 integration manual ARM DII 0020 ATID cortex-a5 ID072410
Contextual Info: CoreSight ETM -A5 ™ Revision: r0p1 Technical Reference Manual Copyright 2009, 2010 ARM. All rights reserved. ARM DDI 0435B ID072410 CoreSight ETM-A5 Technical Reference Manual Copyright © 2009, 2010 ARM. All rights reserved. Release Information

cortex-a5 integration manual

Abstract: cortex-a5 ATID Coresight cortex-a5 processor "coresight design kit" tsva cortex-a5tm
Contextual Info: CoreSight ETM -A5 ™ Revision: r0p2 Technical Reference Manual Copyright 2009, 2010 ARM. All rights reserved. ARM DDI 0435C ID101810 CoreSight ETM-A5 Technical Reference Manual Copyright © 2009, 2010 ARM. All rights reserved. Release Information

VFPv4

Abstract: ARMv7 Architecture Reference Manual cortex-a5 processor CoreSight Architecture Specification ARM cortex instruction set cortex-a5 integration manual ARM IHI 0029 fpu coprocessor Coresight CP15
Contextual Info: Cortex -A5 Floating-Point Unit Revision: r0p0 Technical Reference Manual Copyright 2009 ARM. All rights reserved. ARM DDI 0449A ID012010 Cortex-A5 Floating-Point Unit Technical Reference Manual Copyright © 2009 ARM. All rights reserved. Release Information

DS26524

Contextual Info: Rev: 031109 ERRATA SHEET DS26524 Revision A5 Errata The errata listed below describe situations where DS26524 revision A5 components perform differently than expected or differently than described in the data sheet. Maxim Integrated Products, Inc., intends to correct

cortex-a5

Abstract: cortex 5 Jazelle v1 Architecture Reference Manual cortex-a5 processor cortex-a5 integration manual CP14 CP15 cortex a5 VFPv4-D16 8 stage pipeline architecture of ARMv7
Contextual Info: Cortex -A5 Revision: r0p0 Technical Reference Manual Copyright 2009 ARM. All rights reserved. DDI 0433A ID012010 Cortex-A5 Technical Reference Manual Copyright © 2009 ARM. All rights reserved. Release Information The following changes have been made to this book.

VFPv4-D16

Abstract: ARMv7 Architecture Reference Manual AT551-DC-06001 VFPv4 ARM IHI 0029 fpu coprocessor cortex-a5 VFPv3 CoreSight Architecture Specification CP15
Contextual Info: Cortex-A5 Floating-Point Unit Revision: r0p1 Technical Reference Manual Copyright 2009, 2010 ARM. All rights reserved. ARM DDI 0449B ID101810 Cortex-A5 Floating-Point Unit Technical Reference Manual Copyright © 2009, 2010 ARM. All rights reserved.

VFPv4

Abstract: cortex-a5 VFPv3 instruction set ARM IHI 0029 VFPv4 instruction set ARMv7 Architecture Reference Manual cortex-a5 integration manual ARMv6 Architecture Reference Manual ARMv7 neon ARMv7 Architecture Reference Manual NEON
Contextual Info: Cortex -A5 NEON Media Processing Engine ™ Revision: r0p0 Technical Reference Manual Copyright 2009 ARM. All rights reserved. ARM DDI 0450A ID012010 Cortex-A5 NEON Media Processing Engine Technical Reference Manual Copyright © 2009 ARM. All rights reserved.

LH28F016SUT-70

Abstract: 28F008SA 28F016SV
Contextual Info: Preliminary SL29081-70 T/G A5(V/R/S) 2M X 32 Bits (8MB) Flash Memory Module (5V Only) FEATURES GENERAL DESCRIPTION • • • • The SiliconTech SL29081-70(T/G)A5(V/R/S) is a 2M x 32 bits flash memory module. The SL29081-70(T/G)A5(V/R/S) consists of four 1M x 16 bits CMOS flash memory in 56-pin TSOP-I

flash dqs

Abstract: Bsr 438
Contextual Info: 80-PIN FLASH SIMMS STI29081 -70 T/G A5(R/S) 2M X 32 Bits Flash Memory Module (5 V Only) FEATURES GENERAL DESCRIPTION • • • • • • The Simple Technology STI29081-70(T/G)A5(R'S) is a 2M x 32 bits flash memory module. The Simple Technolo gy STI29081 70(T/G)A5(R/S) consists of four 1M x 16 bits CMOS flash

VFPv4

Abstract: cortex-a5 cortex-a5 integration manual ARMv7 Architecture Reference Manual cortex-a5 processor ARM IHI 0029 VFPv4 instruction set coresight CoreSight Architecture Specification ARMv6 Architecture Reference Manual
Contextual Info: Cortex-A5 NEON Media Processing Engine ™ Revision: r0p1 Technical Reference Manual Copyright 2009, 2010 ARM. All rights reserved. ARM DDI 0450B ID101810 Cortex-A5 NEON Media Processing Engine Technical Reference Manual Copyright © 2009, 2010 ARM. All rights reserved.

RAW MATERIAL SPECIFICATION SHEET

Abstract: chqa 383 h 383-2UYC-S530-A5 Workout
Contextual Info: EVERLIGHT ELECTRONICS CO.,LTD. DATA SHEET PART NO.： DATE 383-2UYC-S530-A5 383-2UYC-S530-A5 ： DEPARTMENT ： CHR&D1 . REVISION ： #REF! RECEIVED • MASS PRODUCTION □ PRELIMINARY □ CUSTOMER DESIGN #REF! DEVICE NUMBER : PAGE : 6 CUSTOMER DESIGNER CHECKER

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information VF6xx, VF5xx, VF3xx Features • Operating characteristics – Voltage range 3 V to 3.6 V – Temperature range ambient -40 °C to 85 °C • ARM Cortex A5 Core features – Up to 500 MHz ARM Cortex A5

cortex-a5

Abstract: cortex-a5 processor arm cortex a5 mpcore arm cortex a9 mpcore Jazelle v1 Architecture Reference Manual PL390 CP15 Powered Monitor jazelle CP14 CP15
Contextual Info: Cortex-A5 MPCore ™ Revision: r0p1 Technical Reference Manual Copyright 2010 ARM. All rights reserved. ARM DDI 0434B ID101810 Cortex-A5 MPCore Technical Reference Manual Copyright © 2010 ARM. All rights reserved. Release Information The following changes have been made to this book.

cortex-a5 processor

Abstract: embedded trace macrocell cortex-a5 integration manual ATID AMBA AXI to APB BUS Bridge
Contextual Info: CoreSight ETM -A5 ™ Revision: r0p0 Technical Reference Manual Copyright 2009 ARM. All rights reserved. ARM DDI 0435A ID012010 CoreSight ETM-A5 Technical Reference Manual Copyright © 2009 ARM. All rights reserved. Release Information The following changes have been made to this book.

cortex-a5 processor

Abstract: mrc 438 at550 Jazelle v1 Architecture Reference Manual cortex-a5 integration manual ARM IHI 0029 VMSA CP15SDISABLE AT551 cortex-a5
Contextual Info: Cortex-A5 Revision: r0p1 Technical Reference Manual Copyright 2009, 2010 ARM. All rights reserved. ARM DDI 0433B ID101810 Cortex-A5 Technical Reference Manual Copyright © 2009, 2010 ARM. All rights reserved. Release Information The following changes have been made to this book.

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data VF6xx, VF5xx, VF3xx Features • Operating characteristics – Voltage range 3 V to 3.6 V – Temperature range ambient -40 °C to 85 °C • ARM Cortex A5 Core features – Up to 500 MHz ARM Cortex A5 – 32 KB/32 KB I/D L1 Cache

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data VF3xxR, VF5xxR Features • Operating characteristics – Voltage range 3 V to 3.6 V – Temperature range ambient -40 °C to 85 °C • ARM Cortex A5 Core features – Up to 400 MHz ARM Cortex A5 – 32 KB/32 KB I/D L1 Cache

27C512TRP-120

Abstract: 27C512TRP-150 27C512TRP-200
Contextual Info: PRELIMINARY SPACE ELECTRONICS INC. 512K OTP EPROM - 64K X 8-BIT SPACE PRODUCTS 27C512TRP A5-A9 VPP 1 32 NC VCC A12 PGM NC A14 A7 A13 A6 A8 A5 A9 A15 SEi 27C512TRP A4 A3 A12-A16 I/O0 Y- Gating Input Data Control I/O15 Y - Decoder A11 OE A10 A2 A1 CE I/O7 I/O6

27C512TRP-120

Abstract: 27C512TRP-150 27C512TRP-200
Contextual Info: SPACE ELECTRONICS INC. 512K OTP EPROM - 64K X 8-BIT SPACE PRODUCTS 27C512TRP A5-A9 VPP 1 32 NC VCC A12 PGM NC A14 A7 A13 A6 A8 A5 A9 A15 SEi 27C512TRP A4 A3 A12-A16 I/O0 Y- Gating Input Data Control I/O15 Y - Decoder A11 OE A10 A2 A1 CE I/O7 I/O6 A0 I/O0 I/O1

32C108BRP-20

Abstract: 1 megabit 128K x 8 SRAM
Contextual Info: SPACE ELECTRONICS INC. 1 MEGABIT 128K X 8-BIT CMOS SRAM SPACE PRODUCTS 32C108BRP Clk Gen. 1 32 A1 A2 A16 A15 A14 A13 A3 CS A2 A3 A4 A10 SEi Vss A11 32C108BRP Vcc I/O3 I/O6 I/O5 WE A4 A12 A11 A5 A10 A9 A8 16 17 A5 Memory Array 512 Rows 256 x 8 Columns Data

Contextual Info: 27C010T 1 Megabit 128K x 8-Bit OTP EPROM A5 VPP 1 32 VCC A9 A16 PGM A15 NC A12 A12 A14 A16 A7 A13 I/O0 A6 A8 I/O7 A5 A9 27C010T A4 A3 1024 x 1024 Memory Matrix X-Decoder Input Data Control Y-Gating Y-Decoder A11 OE A2 A10 A1 CE A0 I/O7 I/O0 I/O6 CE OE A0-A4

Contextual Info: 27C010T 1 Megabit 128K x 8-Bit OTP EPROM VPP 1 32 A5 VCC A9 A16 PGM A15 NC A12 A12 A14 A16 A7 A13 I/O0 A6 A8 I/O7 A5 A9 27C010T A4 A3 1024 x 1024 Memory Matrix X-Decoder Input Data Control Y-Gating Y-Decoder A11 OE A2 A10 A1 CE A0 I/O7 I/O0 I/O6 CE OE A0-A4