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    ZX54HCTLS Datasheets (156)

    Zytrex
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    ZX54HCTLS00J
    		Zytrex Quad 2-input NAND Gates Scan PDF 555.4KB 6
    ZX54HCTLS00N
    		Zytrex Quad 2-input NAND Gates Scan PDF 555.4KB 6
    ZX54HCTLS01J
    		Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF 554.76KB 6
    ZX54HCTLS01N
    		Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF 554.76KB 6
    ZX54HCTLS02J
    		Zytrex Quad 2-input NOR Gates Scan PDF 553.32KB 6
    ZX54HCTLS02N
    		Zytrex Quad 2-input NOR Gates Scan PDF 553.32KB 6
    ZX54HCTLS03J
    		Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF 553.41KB 6
    ZX54HCTLS03N
    		Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF 553.41KB 6
    ZX54HCTLS04J
    		Zytrex Hex Inverters Scan PDF 553.25KB 6
    ZX54HCTLS04N
    		Zytrex Hex Inverters Scan PDF 553.25KB 6
    ZX54HCTLS05J
    		Zytrex Hex Inverters with Open-Drain Outputs Scan PDF 552.29KB 6
    ZX54HCTLS05N
    		Zytrex Hex Inverters with Open-Drain Outputs Scan PDF 552.29KB 6
    ZX54HCTLS08J
    		Zytrex Quad 2-input AND Gates Scan PDF 554.92KB 6
    ZX54HCTLS08N
    		Zytrex Quad 2-input AND Gates Scan PDF 554.92KB 6
    ZX54HCTLS09
    		Zytrex Quad 2-Input AND Gates with Open Drain Outputs Scan PDF 550.42KB 6
    ZX54HCTLS09J
    		Zytrex Quad 2-Input AND Gates with Open Drain Outputs Scan PDF 550.42KB 6
    ZX54HCTLS09N
    		Zytrex Quad 2-Input AND Gates with Open Drain Outputs Scan PDF 550.42KB 6
    ZX54HCTLS10
    		Zytrex Triple 3-Input NAND Gates Scan PDF 556.27KB 6
    ZX54HCTLS107AJ
    		Zytrex Dual J-K Negative-Edge-Triggered Flip-Flops with Clear Scan PDF 593.74KB 7
    ZX54HCTLS107AN
    		Zytrex Dual J-K Negative-Edge-Triggered Flip-Flops with Clear Scan PDF 593.74KB 7
    ...

    ZX54HCTLS Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74HCTLS

    Contextual Info: Zvtrex ZX54HCTLS ZX74HCTLS February 1985 78A Dual J-K Flip-Flops with Preset, Common Clear & Common Clock O B J E C T IV E SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These parts consist of two oegatjye-edge-triggered J-K


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF

    74HCTLS

    Contextual Info: Z y tr e x ZX54HCTLS M ZX74HCTLS M February 1985 M Hex Schmitt-Trigger Inverters OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74LS logic family These Schm itt-trigger devices contain six independent


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF

    74hctls

    Contextual Info: Zytrex ZX54HCTLS ZX74HCTLS no f M^ Quad 2-Input NOR Gates February 1905 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These d e vice s con tain fo u r in d e p e n d e n t 2 -in put N O R


    OCR Scan     		54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74hctls PDF

    74hctls

    Contextual Info: Zytrex ZX54HCTLS ZX74HCTLS 73A Dual J-K Negative-Edge-Triggered Flip-Flops with Clear Februa ry 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain two independent J-K negativeedge-triggered flip-flops. A low level at the CLR input


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls PDF

    74HCTLS

    Contextual Info: Zytrex ZX54HCTLS ZX74HCTLS February 1985 273 Octal D-Type Flip-Flops with Clear OBJECTIVE SPECIFICATIONS Features Description • Eight positive-edge-triggered D-type flipflops with single-rail outputs these devices are high-speed octal registers. They con­


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF

    74LS TTL 245

    Abstract: 74HCTLS 74hctl PPT Diode specifications
    Contextual Info: Zytrex ZX54HCTLS ZX74HCTLS February 1985 245 Octal Bus Transceivers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These high-speed octal bus transceivers are designed


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74LS TTL 245 74HCTLS 74hctl PPT Diode specifications PDF

    74HCTLS

    Contextual Info: Zvtrex ZX54HCTLS ZX74HCTLS 138 3-Line to 8-Line Decoders/Multiplexers February 1985 OBJECTIVE SPECIFICATIONS Features Description m Designed specifically for high-speed memory These devices are designed to be used in high-perform ­ ance m em ory-decoding or data-routing applications re­


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls 54HCTLS PDF

    74HCTLS

    Abstract: diode S4 596
    Contextual Info: Zytrex ZX54HCTLS ZX74HCTLS February 1985 191 Synchronous 4-Bit Up/Down Binary Counters OBJECTIVE SPECIFICATIONS Features tion e lim in ates the o u tp u t co u n tin g s p ike s no rm a lly a s s o ­ ciate d w ith a syn ch ro n o u s rip ple clo ck cou nters.


    OCR Scan     		ZX74HCTLS S4/74LS 74HCTLS: 54HCTLS: 74HCTLS diode S4 596 PDF

    74HCTLS

    Abstract: and cmos Zytrex
    Contextual Info: Zvtrex ZX54HCTLS Æ ZX74HCTLS F e b ru a ry 1985 i S m^ Dual Retriggerable Monostable Multivibrator OBJECTIVE SPECIFICATIONS Features Description • Simple pulse width formula T = RC The '423 contains two retriggerable monostable multivi­ brators that feature both a negative, A, and a positive, B,


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS and cmos Zytrex PDF

    HCTLS

    Abstract: 74hctls
    Contextual Info: Z v t n ZX54HCTLS M ZX74HCTLS x February 1985 Quad 2-Input AND Gates with Open-Drain Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-Input AND


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS 74hctls PDF

    74HCTLS

    Abstract: hctls574 HCTLS
    Contextual Info: Zytrex ZX54HCTLS ZX74HCTLS February 1985 574 Octal D-Type Flip-Flops with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family ■ Low power consumption characteristic of


    OCR Scan     		ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS hctls574 HCTLS PDF

    K413

    Abstract: 74HCTLS Zytrex 161
    Contextual Info: # MJ Lmm ZXS4HCTLS § ZX74HCTLS M Februa,y1985 t ZX54HCTLS ZX74HCTLS M Ë m a Ê WÂ À t m Synchronous 4-Bit Binary Counters O B JE C T IV E S P E C IF IC A T IO N S ' * Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: K413 74HCTLS Zytrex 161 PDF

    74HCTLS

    Contextual Info: Z v tre x ZX54HCTLS § ZX74HCTLS M 8-Bit Parallel-ln/Serial-Out Shift Registers with Clear February 1985 OBJECTIVE SPECIFICATIONS Features Description • Synchronous load These devices feature parallel-in or serial-in, serial-out registers, gated clock inputs and an overriding clear in­


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF

    74HCTLS

    Abstract: 1411D
    Contextual Info: Zyfrex ZX54HCTLS # # ZX74HCTLS M M February 1985 •» 4-Bit D-Type Registers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description ■ Gated output control lines for enabling or disabling the outputs These 4-bit registers contain D-type flip-flops with 3-state


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: -556C 74HCTLS 1411D PDF

    74hctls

    Abstract: si158
    Contextual Info: h flwar ZX54HCTLS ZX74HCTLS February 1985 157 zxm h c tls 158 Quad 2-Line to 1-Line Data Selector/Multiplexers OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These are data selector/multiplexers which select a 4-bit


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: hctlsi57, hctlsi58 74HCTLS 54HCTLS Ta--55Â si158 PDF

    74HCTLS

    Contextual Info: Zvtrex 540 SSS&541 ZX54HCTLS ZX74HCTLS Octal Buffers and Line Drivers with 3-State Outputs F ebrua ry 1985 OBJECTIVE SPECIFICATIONS Features Description m Function, pin-out, speed and drive The '540 and ’541 are general purpose high-speed octal line drivers/buffers with 3-state outputs. The inputs and


    OCR Scan     		ZX54HCTLS ZX74HCTLS S4/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF

    74HCTLS

    Contextual Info: Z v tre x ZX54HCTLS _ 1 ZX74HCTLS Quad 2-Port Registers February 1965 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These are high-speed quad 2-port registers. They are the logical equivalent of a quad 2-input multiplexer followed


    OCR Scan     		ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF

    HCTLS266

    Abstract: 74HCTLS
    Contextual Info: Zvtrex ZX54HCTLS ZX74HCTLS 266 Quad Exdusive-NOR Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent exclusive-NOR


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS266 74HCTLS PDF

    74HCTLS

    Abstract: M593
    Contextual Info: ZX54HCTLS ZX74HCTLS M l ZX54HCTLS 2X74HCTLS K 8 ~B it Binary Counter with Input Register and 8-Bit Binary Counter with Bidirectional input Register/Counter Outputs o b je c t iv e s p e c ific a tio n s Features Description • Function, pin-out, speed and drive


    OCR Scan     		ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS M593 PDF

    Zytrex

    Abstract: 74HCTLS
    Contextual Info: Z v tr e x #£ ZX54HCTLS ZX74HCTLS Ë Fe brua ry 1965 1 T W M 8-Line to 3-Line Priority Encoders OBJECTIVE SPECIFICATIONS Features Description m Encodes eight data lines In priority The '148 provides three bits of binary coded output rep­ resenting the position of the highest order active input,


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: Zytrex 74HCTLS PDF

    749 pin configuration

    Abstract: 74HCTLS D 2578
    Contextual Info: Z v t r e ZX54HCTLS ZX74HCTLS x February 1985 W f # 8-Bit Binary Counter with 3-State Output Register OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family The '590 contains an 8-bit binary counter which feeds an


    OCR Scan     		ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 749 pin configuration 74HCTLS D 2578 PDF

    74hctls

    Contextual Info: Z v tre x ZX54HCTLS § ZX74HCTLS W M 8-Bit Serial-ln/Parallel-Out Shift Registers February 1985 OBJECTIVE SPECIFICATIONS • Features Description • AND-Gated enable/disable serial inputs These are high-speed 8-bit shift registers with AND-gated serial inputs and an asynchronous clear. Data is en­


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls PDF

    HCTLS

    Abstract: 74HCTLS 198S ZX64HCTLS PT500 table
    Contextual Info: Zvtrax # _% ZX54HCTLS ZX74HCTLS M February 1985 % 0§ Dual 1-of-4 Decoder/Multiplexers OBJECTIVE SPECIFICATIONS Features Description • Designed specifically for high-speed memory decoders and data transmission systems These devices are designed to be used in high-perform ­


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: hctlsi39 74HCTLS Ta--40Â 54HCTLS HCTLS 198S ZX64HCTLS PT500 table PDF

    74HCTLS

    Contextual Info: Zvtrex ZX54HCTLS ZX74HCTLS J # f j I I L Dual J-K Flip-Flops with Preset and Clear February 1985 OBJECTIVE SPECIFICATIONS Features Description m Function, pin-out, speed and drive These parts consist of two negative-edge-triggered J-K flip-flops with independent J, K, preset, clear and clock


    OCR Scan     		ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS PDF