SN74ACT74 Search Results

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

001-0036

Abstract: ACT74 SN54ACT74 SN74ACT74 GND200 act74 texas
Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520C - AUGUST 19 95-R E V IS E D SEPTEMBER 1996 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-jj.m Process Package Options Include Plastic

AD74 TI

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520G – AUGUST 1995 – REVISED NOVEMBER 2002 D D D D SN54ACT74 . . . J OR W PACKAGE SN74ACT74 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 4.5-V to 5.5-V VCC Operation

AD74 TI

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520G – AUGUST 1995 – REVISED NOVEMBER 2002 D D D D SN54ACT74 . . . J OR W PACKAGE SN74ACT74 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 4.5-V to 5.5-V VCC Operation

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN74ACT74ĆEP DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH CLEAR AND PRESET SCAS722 − OCTOBER 2003 D Controlled Baseline D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

ACT74

Abstract: SN54ACT74 SN74ACT74 SN74ACT74D SN74ACT74DBR SN74ACT74DR SN74ACT74N SN74ACT74NSR SN74ACT74PW AD74
Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

ACT74

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN74ACT74ĆEP DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH CLEAR AND PRESET SCAS722 − OCTOBER 2003 D Controlled Baseline D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: SN74ACT74ĆEP DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH CLEAR AND PRESET SCAS722 − OCTOBER 2003 D Controlled Baseline D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520G – AUGUST 1995 – REVISED NOVEMBER 2002 D D D D SN54ACT74 . . . J OR W PACKAGE SN74ACT74 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 4.5-V to 5.5-V VCC Operation

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCAS520E – AUGUST 1995 – REVISED JANUARY 2000 D D D SN54ACT74 . . . J OR W PACKAGE SN74ACT74 . . . D, DB, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible

Contextual Info: SN74ACT74ĆEP DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH CLEAR AND PRESET SCAS722 − OCTOBER 2003 D Controlled Baseline D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

5962-8752501MCA

Abstract: ACT74 SN54ACT74 SN74ACT74 SN74ACT74D SN74ACT74DBR SN74ACT74DR SN74ACT74N SN74ACT74NSR SN74ACT74PW
Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FUP-FLOPS WITH CLEAR AND PRESET _ SCAS520D - AUGUST 1995 - REVISED DECEMBER 1997 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-p.m Process

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET _ SCAS520C - AUGUST 1995 - REVISED SEPTEMBER 1996 Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS 1-iim Process

AD74 TI

Abstract: ACT74 SN54ACT74 SN74ACT74 SN74ACT74D SN74ACT74DBR SN74ACT74DR SN74ACT74N SN74ACT74NSR SN74ACT74PW
Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible

Contextual Info: SN74ACT74ĆEP DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH CLEAR AND PRESET SCAS722 − OCTOBER 2003 D Controlled Baseline D D D D − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing