SCAS827 Search Results

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827 – AUGUST 2006 1.8-V PHASE LOCK LOOP CLOCK DRIVER FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible Operating Frequency: 125 MHz to 410 MHz

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

2506036017Y0

Abstract: CDCU2A877 CDCU2A877ZQL CDCU2A877ZQLR CDCU2A877ZQLT CDCUA877
Contextual Info: CDCU2A877 www.ti.com SCAS827 – AUGUST 2006 1.8-V PHASE LOCK LOOP CLOCK DRIVER FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible Operating Frequency: 125 MHz to 410 MHz

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

2506036017Y0

Abstract: CDCU2A877 CDCU2A877ZQL CDCU2A877ZQLR CDCU2A877ZQLT CDCUA877
Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

Contextual Info: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible

SB865A

Abstract: SB866A ddr2 PLL JESD82 SSTUx32864 SSTU32868 JEDEC DDR2-400 2rx8 SB866 SN74SSTUB32866
Contextual Info: Application Report SCAA101 – March 2009 DDR2 Memory Interface Clocks and Registers – Overview Christian Schmoeller . CDC - Clock Distribution Circuits ABSTRACT This application report gives an overview of the existing JEDEC DDR2 Register and

JESD21

Abstract: CDCU2A877 CDCU877B CDCUA877 TS5A6542
Contextual Info: Application Report SCAA087 – May 2008 Application Examples for the CDCUx877x PLL Family Christian Schmoeller . CDC - Clock Distribution Circuits ABSTRACT This application report provides examples of how to use the PLLs of the CDCUx877x