SCAS684 Search Results

S-PQFP-G32

Abstract: CDCLVD110 CDCLVD110VF CDCLVD110VFG4 CDCLVD110VFR CDCLVD110VFRG4 S-PQFP-G32 TI
Contextual Info: CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684A − SEPTEMBER 2002 − REVISED OCTOBER 2003 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2 Q1 Q1 Q0 Q0 VDD 25 16 26 15 27 14

Contextual Info: Not Recommended for New Designs CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684B − SEPTEMBER 2002 − REVISED FEBRUARY 2007 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2

Contextual Info: CDCLVD110 w w w .t i.c om SCAS684C – SEPTEMBER 2002 – REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER FEATURES 1 • • • • • • • • • LQFP PACKAGE Low-Output Skew <30 ps Typical for

S-PQFP-G32 TI

Contextual Info: CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684A − SEPTEMBER 2002 − REVISED OCTOBER 2003 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2 Q1 Q1 Q0 Q0 VDD 25 16 26 15 27 14

Contextual Info: Not Recommended for New Designs CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684B − SEPTEMBER 2002 − REVISED FEBRUARY 2007 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2

S-PQFP-G32

Abstract: CDCLVD110 CDCLVD110VF CDCLVD110VFG4 CDCLVD110VFR
Contextual Info: CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684A − SEPTEMBER 2002 − REVISED OCTOBER 2003 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2 Q1 Q1 Q0 Q0 VDD 25 16 26 15 27 14

CDCLVD110

Abstract: S-PQFP-G32
Contextual Info: CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684A − SEPTEMBER 2002 − REVISED OCTOBER 2003 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2 Q1 Q1 Q0 Q0 VDD 25 16 26 15 27 14

Contextual Info: Not Recommended for New Designs CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684B − SEPTEMBER 2002 − REVISED FEBRUARY 2007 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2

CDCLVD110

Abstract: S-PQFP-G32
Contextual Info: CDCLVD110 PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684 – SEPTEMBER 2002 D Low-Output Skew <30 ps Typical for TQFP PACKAGE (TOP VIEW) Clock-Distribution applications D D D D D 24 23 22 21 20 19 18 17 VSS Q2 Q2 Q1 Q1 Q0 Q0 VDD 25 16 26 15 27 14

CDCLVD110

Abstract: CDCLVD110A CDCLVD110VF CDCLVD110VFG4 CDCLVD110VFR CDCLVD110VFRG4 S-PQFP-G32
Contextual Info: Not Recommended for New Designs CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684B − SEPTEMBER 2002 − REVISED FEBRUARY 2007 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2

Contextual Info: Not Recommended for New Designs CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684B − SEPTEMBER 2002 − REVISED FEBRUARY 2007 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2

CDCLVD110VFRG4

Contextual Info: CDCLVD110 www.ti.com SCAS684C – SEPTEMBER 2002 – REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER FEATURES 1 • • • • • • • • • LQFP PACKAGE Low-Output Skew <30 ps Typical for Clock-Distribution Applications

Contextual Info: Not Recommended for New Designs CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684B − SEPTEMBER 2002 − REVISED FEBRUARY 2007 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2

Contextual Info: CDCLVD110 www.ti.com SCAS684C – SEPTEMBER 2002 – REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER FEATURES 1 • • • • • • • • • LQFP PACKAGE Low-Output Skew <30 ps Typical for Clock-Distribution Applications

Contextual Info: CDCLVD110 www.ti.com SCAS684C – SEPTEMBER 2002 – REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER FEATURES 1 • • • • • • • • • LQFP PACKAGE Low-Output Skew <30 ps Typical for Clock-Distribution Applications

CDCLVD110

Abstract: CDCLVD110VF CDCLVD110VFG4 CDCLVD110VFR CDCLVD110VFRG4 S-PQFP-G32
Contextual Info: CDCLVD110 PROGRAMMABLE LOWĆVOLTAGE 1:10 LVDS CLOCK DRIVER SCAS684A − SEPTEMBER 2002 − REVISED OCTOBER 2003 D Low-Output Skew <30 ps Typical for D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VSS Q2 Q2 Q1 Q1 Q0 Q0 VDD 25 16 26 15 27 14

Contextual Info: CDCLVD110 www.ti.com SCAS684C – SEPTEMBER 2002 – REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER FEATURES 1 • • • • • • • • • LQFP PACKAGE Low-Output Skew <30 ps Typical for Clock-Distribution Applications

CDCLVD110

Abstract: CDCLVD110A CDCLVD110VF CDCLVD110VFG4 CDCLVD110VFR CDCLVD110VFRG4 S-PQFP-G32
Contextual Info: CDCLVD110 www.ti.com SCAS684C – SEPTEMBER 2002 – REVISED JANUARY 2008 Not Recommended for New Designs PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER FEATURES 1 • • • • • • • • • LQFP PACKAGE Low-Output Skew <30 ps Typical for Clock-Distribution Applications

SN65LVDS100 Application Report

Abstract: CDC111 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT33 SLLA101 sn65lvds CML100
Contextual Info: Application Report SCAA059C – March 2003 – Revised October 2007 AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Kal Mustafa/Chris Sterzik. High Performance Analog

PN9000

Abstract: Aeroflex PN9000 HP8656B CDCLVD110 HP6624A OC48 TDS694C Tektronix 464 B694
Contextual Info: Application Report SCAA066 – AUGUST 2003 Benefits of Using TI’s Non-PLL Clock Buffer: Best in Class Phase Noise/Phase Jitter and Crosstalk Performance Heather McClendon /Kal Mustafa High-Performance Analog/CDC ABSTRACT This application report presents various jitter and phase noise measurements of three

CML Vterm

Abstract: CDC111 CDCLVD110 CDCLVP110 CDCVF111 SN65LVDS101 SN65LVDT100 SN65LVDT122 SN65LVDT33 SN64LVDS33
Contextual Info: Application Report SCAA059 – March 2003 AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML Kal Mustafa/Chris Sterzik High Performance Analog ABSTRACT This report provides a quick reference of ac-coupling techniques for interfacing between different logic levels. The four differential signaling levels found in this report are lowvoltage positive-referenced emitter coupled logic LVPECL , low-voltage differential

SN65LVD100

Abstract: Texas Instruments Application Report DC-Coupling TLK1501 SCAA059 scas683 SCAA056 SCAA062 CDC111 CDCVF111 SN65LVDS100
Contextual Info: Application Report SCAA062 – March 2003 DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CM Kal Mustafa / Chris Sterzik High Performance Analog ABSTRACT This report describes various methods of interfacing different logic levels. The focus is dccoupling between the following differential signaling: LVPECL low-voltage positivereferenced emitter coupled logic , LVDS (low-voltage differential signals), HSTL (highspeed transceiver logic), and CML (current-mode logic). The report discusses sixteen