SCAS144 Search Results

SCAS144

Contextual Info: 74ACT11898 10-BIT PARALLEL-OUT SERIAL SHIFT REGISTER SCAS144 – OCTOBER 1990 – REVISED APRIL 1993 • • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs

Contextual Info: 74ACT11898 10ĆBIT PARALLELĆOUT SERIAL SHIFT REGISTER ą ą SCAS144 − OCTOBER 1990 − REVISED APRIL 1993 • • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs

SCAS144

Abstract: 74ACT11898 74ACT11898DW
Contextual Info: 74ACT11898 10ĆBIT PARALLELĆOUT SERIAL SHIFT REGISTER ą ą SCAS144 − OCTOBER 1990 − REVISED APRIL 1993 • • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs

74ACT11898

Abstract: SCAS144
Contextual Info: 74ACT11898 10-BIT PARALLEL-OUT SERIAL SHIFT REGISTER SCAS144 – OCTOBER 1990 – REVISED APRIL 1993 • • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs

Contextual Info: 74ACT11898 10-BIT PARALLEL-OUT SERIAL SHIFT REGISTER SCAS144 – OCTOBER 1990 – REVISED APRIL 1993 • • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs

Contextual Info: 74ACT11898 10ĆBIT PARALLELĆOUT SERIAL SHIFT REGISTER ą ą SCAS144 − OCTOBER 1990 − REVISED APRIL 1993 • • • • • • • • • • DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs