RGB640 Search Results

Contextual Info: RGB640 1.0 Introduction T h e RG B640 is a h ig h p erfo rm an ce p a le tte DAC w hich accepts d ig ital pixels a n d con v erts th e d a ta to an alo g form . A block d ia g ra m is given in F ig u re 1 chi p<;gr; 3. T h e RG B640 com bines fe a tu re s u se d in ad v an ced w o rk ­

Contextual Info: RGB640 4.0 Window Attribute Tables The RGB640 has tw o independent window a ttrib u te tables, one for the fram e buffer layer and one for the overlay layer. The Frame B uffer Window A ttrib u te Table controls the display mode of the fram e buffer data, selects the frame

Contextual Info: RGB640 6.0 VGA The ch ip can be placed in V G A mode by p ro p e rly s e ttin g th e V G A C on tro l R egister {re g is te r OxOOOB . A fte r reset, th e chip is in V G A mode. In V G A mode, e ig h t b its o f pixel d a ta are presented to th e p a le tte every load clock cycle. T h is e ig h t b it bus is

Contextual Info: RGB640 10.0 Register Descriptions 10.1 0x0000 Identification 7 6 5 4 3 2 1 IDLO POR: 0x1 C Bits 7 0: ID LO - The low byte of the product identification code. 0x1 C 10.2 0x0001 Identification / Revision Level 7 6 5 4 3 REV 4: Bits 3 0: 48 1 IDHI 0x12 POR:

0x8809

Contextual Info: RGB640 9.0 Software Interface m u s t be w r itte n w ith th e s ta rtin g p a le tte address before reading fro m th e p a le tte d a ta port. 9.1 Processor I/O Space The p a le tte da ta p o rt can be accessed as e ith e r s ix b its o r e ig h t b its wide.

Contextual Info: RGB640 5.0 Cursor and Crosshair 5.1 Cursor Each p ixe l o f th e cu rso r uses 2 bits, th u s 4 cursor pixels are stored in each byte of th e array. The e n tire a rra y is used to c o n ta in th e 64 x 64 pixel cu rso r image. O n ly 256 bytes a re re q u ire d to store a 32 x 32 pixel cu rsor image.

WC03

Abstract: wb03 IX151
Contextual Info: RGB640 2.0 Serializer T he s e ria liz e r is loaded w ith m u ltip le p ixels a t th e ris in g edge o f th e load clock. The p ixels are th e n serialized in te rn a lly to produce one pixel fo r each video clock cycle. T he RG B640 fe a tu re s a pro g ra m m a b le s e ria liz e r capa­

IBM37RGB640

Abstract: 37rgb640 BOS 0 206 002 111 up bord intermediate 37rgb irgb640 CF 4093 N pal to vga convertor IBM vga registers RGB640
Contextual Info: IBM RGB640 170/220 MHz High Performance Palette DAC Product Description Product Highlights The RGB640TM High Performance Palette DAC from IBM combines a comprehensive array of high-end display subsystem features with real-time layer-blending and color space conversion

Contextual Info: RGB640 1.0 Introduction T h e RG B640 is a h ig h p erfo rm an ce p a le tte DAC w hich accepts d ig ital pixels a n d con v erts th e d a ta to an alo g form . A block d ia g ra m is given in F ig u re I on p ag e 3. T h e RG B640 com bines fe a tu re s u se d in ad v an ced w o rk ­

LK A W01

Contextual Info: RGB640 11.0 Pin Descriptions 11.1 Summary Description Number Video Reference Clock Input 1 External Video Clock Input 2 Auxiliary Reference Clock Input 1 Auxiliary PLL Output Clock Output 1 Divided Dot Clock Output 1 Serial Clock Output 1 Load Clock Input

Contextual Info: RGB640 7.0 Clocking 7.3 PLL Operation and Programming T he video clock g e n e ra to r provides th e fu n d a m e n ta l pixel tim in g s w hen th e ch ip is n o t o p e ra tin g in V G A mode. I t serves g e n e ra lly as th e clock b o th fo r th e in te r­

Contextual Info: RGB640 12.0 Electrical and Timing Specifications Table 37. Recommended Operating Conditions P a r a m e te r S ym bol M in Typ M ax U n its V DD DAC V DD V ideo P L L V DD 3.3 3.3 3.3 3.3 3.8 3.8 3.8 3.8 V A u x ilia r y P L L V DD 3.0 3.0 3.0 3.0 Case T e m p e ra tu re 1

Contextual Info: RGB640 1.0 Introduction T h e R G B 6 40 is a high perform ance p a le tte D A C w hich accepts d ig ital pixels and converts th e d ata to analog form . A block d ia g ram is given in F ig u re 1 on page 3. T h e R G B 6 40 combines fea tu res used in advanced w o rk ­

Contextual Info: RGB640 8.0 Diagnostics 8.1 MISR A M u ltip le In p u t S h ift R egister M IS R is used to enhance te s ta b ility of th e fra m e b u ffe r to RG B640 in te r­ face. The M IS R c o n tin u a lly processes th e 30 b it d ig ita l DAC pixel in p u t fo r a fra m e of data in to a s ig n a tu re and