JEDEC MO-153
Abstract: MTD56
Contextual Info: Revised January 1999 Package MTD56 56-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide Package Number MTD56 1999 Fairchild Semiconductor Corporation mtd56.prf www.fairchildsemi.com Package MTD56 January 1999
|
Original
|
mtd5656-leadmo-153jedec mo-153 |
PDF
|
MTD56
Contextual Info: 56 Lead Molded Thin Shrink Small Outline Package JEDEC NS Package Number MTD56 All dimensions are in millimeters LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
|
Original
|
mtd56 |
PDF
|
|
Contextual Info: DS90CR287,DS90CR288A DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz Literature Number: SNLS056F DS90CR287/DS90CR288A +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz General Description Features The DS90CR287 transmitter converts 28 bits of LVCMOS/
|
Original
|
ds90cr287ds90cr288ads90cr287/ds90cr288a28-bit+2link-85snls056f
|
PDF
|
|
Contextual Info: LM98725 LM98725 3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/CMOS Output, Integrated CCD/CIS Sensor Timing Generator and Spread Spectrum Clock Generation Literature Number: SNAS474D LM98725 3 Channel, 16-Bit, 81 MSPS Analog Front End with LVDS/ CMOS Output, Integrated CCD/CIS Sensor Timing
|
Original
|
lm9872516-bitsnas474d |
PDF
|
DS90CR283
Abstract: DS90CR283MTD DS90CR284 DS90CR284MTD MTD56
Contextual Info: DS90CR283/DS90CR284 28-Bit Channel Link-66 MHz General Description The DS90CR283 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every
|
Original
|
ds90cr283/ds90cr28428-bitlink-66ds90cr283+4ds90cr284ds90cr283mtdds90cr284mtdmtd56
|
PDF
|
MTD48
Abstract: MTD56 V44A V68A sine wave inverter 220v
Contextual Info: April 2002 COP8CBR9/COP8CCR9/COP8CDR9 8-Bit CMOS Flash Microcontroller with 32k Memory, Virtual EEPROM, 10-Bit A/D and Brownout General Description The COP8CBR/CCR/CDR9 Flash microcontrollers are highly integrated COP8 Feature core devices, with 32k Flash memory and advanced features including Virtual EEPROM, A/D, High Speed Timers, USART, and Brownout
|
Original
|
10-bitmtd48mtd56v44a+2v68asine wave inverter 220v
|
PDF
|
74LCX16821MEA
Abstract: 74LCX16821MEAX 74LCX16821MTD 74LCX16821MTDX MTD56 LCX16821
Contextual Info: LCX16821 N a tio n a l & PRELIMINARY Semiconductor 74LCX16821 Low-Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and Outputs General Description Features The LCX16821 contains twenty non-inverting D-type Flip Flops with TRI-STATE outputs and is intended for bus ori
|
OCR Scan
|
lcx1682120-bitb50iiaa74lcx16821mea+474lcx16821meax74lcx16821mtd74lcx16821mtdxmtd56
|
PDF
|
10B0
Abstract: 10B1 11B1 74LVX16212 74LVX16212MEA 74LVX16212MEAX
Contextual Info: LVX16212 National ADVANCE INFORMATION Semiconductor 74LVX16212 24-Bit Bus-Exchange Switch General Description Features The LVX16212 provides 24 bits of high-speed CMOS i n compatible bus switches or bus exchangers. The low on resistance of the switch allows inputs to be connected to
|
OCR Scan
|
74lvx1621224-bitlvx16212tl/f/12641-1+6bsg112210b010b111b174lvx16212mea74lvx16212meax
|
PDF
|
12024-3
Abstract: 74LVT16652 74LVT16652MEA 74LVT16652MEAX 74LVT16652MTD 74LVT16652MTDX LVT16652 MTD56
Contextual Info: LVT16652 ADVANCE INFORMATION National Semiconductor 74LVT16652 3.3V ABT 16-Bit Transceiver/Register with TRI-STATE Outputs General Description Features The LVT16652 consists of sixteen bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multi
|
OCR Scan
|
74lvt1665216-bitlvt16652sg112e+612024-374lvt16652mea74lvt16652meax74lvt16652mtd74lvt16652mtdxmtd56
|
PDF
|
5252 f 1110
Abstract: GTLP16612 GTLP16612MEA GTLP16612MTD MTD56
Contextual Info: co co ß O National Semiconductor PRELIMINARY GTLP16612 CMOS 18-Bit GTLP/TTL Universal Bus Transceiver General Description The GTLP16612 is one in a series of transceivers designed specifically for GTLP logic levels. The device is a CMOS GTLP 18-Bit registered bus transceivers which combines
|
OCR Scan
|
gtlp1661218-bittl/f/12390-8tl/f/12390-9+5b5d11225252 f 1110gtlp16612meagtlp16612mtdmtd56
|
PDF
|
DS90CR287
Abstract: DS90CR287MTD DS90CR288 DS90CR288MTD MTD56 LVDS 30 pin connector cable signal path designer
Contextual Info: DS90CR288 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link Receiver - 75 MHz General Description Features The DS90CR287 see DS90CR287/288A datasheet transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data
|
Original
|
ds90cr28828-bitds90cr287ds90cr287/288a+5ds90cr287mtdds90cr288mtdmtd56lvds 30 pin connector cablesignal path designer
|
PDF
|
DS90CF365MTD
Abstract: DS90CF365 DS90C385 DS90C365 DS90C365MTD DS90C385MTD MTD56 SLC64A
Contextual Info: DS90C385/DS90C365 +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display FPD Link-85 MHz, +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz General Description The DS90C385 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.
|
Original
|
ds90c385/ds90c36524-bitlink-8518-bit+8ds90c385ds90cf365mtdds90cf365ds90c365ds90c365mtdds90c385mtdmtd56slc64a
|
PDF
|
DS90CF364A
Abstract: DS90CF364AMTD DS90CF384A DS90CF384AMTD MTD56
Contextual Info: DS90CF384A/DS90CF364A +3.3V LVDS Receiver 24-Bit Flat Panel Display FPD Link— 65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link— 65 MHz General Description Features The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec
|
Original
|
ds90cf384a/ds90cf364a24-bit18-bitds90cf384a+5ds90cf364atransmitt959ds90cf364amtdds90cf384amtdmtd56
|
PDF
|
DS90CF583
Abstract: DS90CF583MTD DS90CF584 DS90CF584MTD MTD56 TTL RGB 24bit
Contextual Info: General Description Features The DS90CF583 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle
|
Original
|
ds90cf583ds90cf584ds012616ds90cf583mtd+3ds90cf584mtdmtd56ttl rgb 24bit
|
PDF
|
|
|
DS90CF581
Abstract: DS90CF581MTD MTD56
Contextual Info: General Description Features The DS90CF581 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle
|
Original
|
ds90cf581ds012486ds90cf581mtdmtd56 |
PDF
|
DS90CR281
Abstract: DS90CR281MTD DS90CR282 DS90CR282MTD MTD56 AN-1035
Contextual Info: General Description The DS90CR281 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle
|
Original
|
ds90cr281ds90cr282ds012638ds90cr281mtd+3ds90cr282mtdmtd56an-1035
|
PDF
|
AEC-Q100
Abstract: DS90CR216A DS90CR216AMTD DS90CR286A DS90CR286AMTD DS90CR286AQMT MTD48 adc 28bit
Contextual Info: April 7, 2011 +3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link - 66 MHz, +3.3V Rising Edge Strobe LVDS Receiver 21-Bit Channel Link - 66 MHz General Description Features The DS90CR286A receiver converts the four LVDS data streams Up to 1.848 Gbps throughput or 231 Megabytes/sec
|
Original
|
28-bit21-bitds90cr286ads90cr216a+6aec-q100ds90cr216amtdds90cr286amtdds90cr286aqmtmtd48adc 28bit
|
PDF
|
SN75LVDS81
Abstract: DS90C383A DS90C383AMTD DS90CF383A DS90CF383AMTD DS90CF384 SN75LVDS83
Contextual Info: General Description Features The DS90C383A/DS90CF383A transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth
|
Original
|
ds90c383a/ds90cf383ads90c383ads90cf383ads100100+5sn75lvds81ds90c383amtdds90cf383amtdds90cf384sn75lvds83
|
PDF
|
DS90CR581
Abstract: DS90CR581MTD MTD56
Contextual Info: DS90CR581 LVDS Transmitter 24-Bit Color Flat Panel Display FPD Link General Description Features The DS90CR581 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle
|
Original
|
ds90cr58124-bitth959ds90cr581mtd+1mtd56
|
PDF
|
DS90C383B
Abstract: DS90CF364A DS90CF364AMTD DS90CF384A DS90CF384AMTD MTD48 MTD56
Contextual Info: DS90CF384A/DS90CF364A +3.3V LVDS Receiver 24-Bit Flat Panel Display FPD Link —65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link—65 MHz General Description Features The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec
|
Original
|
ds90cf384a/ds90cf364a24-bit18-bitlink--65+7ds90cf384ads90cf364ads90c383bds90cf364amtdds90cf384amtdmtd48mtd56
|
PDF
|
|
Contextual Info: Preliminary Revised June 2000 FSTUD16211 24-Bit Bus Switch with Level Shifting and −2 Volt Undershoot Protection Preliminary General Description Features The Fairchild Switch FSTUD16211 provides 24-bits of high-speed CMOS TTL-compatible bus switching. The low
|
Original
|
fstud1621124-bit24-bits12-bit |
PDF
|
|
Contextual Info: Revised June 2000 FSTD16211 24-Bit Bus Switch with Level Shifting General Description Features The Fairchild Switch FSTD16211 provides 24-bits of highspeed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to
|
Original
|
fstd1621124-bit24-bits12-bit |
PDF
|
74LCX16821
Abstract: 74LCX16821MEA 74LCX16821MTD MTD56
Contextual Info: 74LCX16821 Low Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and Outputs General Description Features The LCX16821 contains twenty non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage
|
Original
|
74lcx1682120-bitlcx1682174lcx16821mea+274lcx16821mtdmtd56
|
PDF
|
74VCX162839
Abstract: 74VCX162839MTD MTD56 VCX162839
Contextual Info: 74VCX162839 Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in the Outputs General Description Features The VCX162839 contains twenty non-inverting selectable buffered or registered paths. The device can be configured
|
Original
|
74vcx16283920-bitvcx16283974vcx162839mtd+1mtd56
|
PDF
|