LH540206 Search Results
LH540206 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: LH540206 FEATURES • Fast Access Times: 20/25/35/50 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing • Expandable in Width and Depth • Full, Half-Full, and Empty Status Flags |
OCR Scan |
LH540206 IDT7206 IDT7201 LH5496 LH540201 28-Pin, 300-mil 600-mil LH540206 | |
Contextual Info: LH540206 FEATURES • Fast Access Times: 20/25/35/50/65/80 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing • Expandable in Width and Depth • Full, Half-Full, and Empty Status Rags |
OCR Scan |
LH540206 IDT7206 IDT7201 LH5496 LH540201 28-Pin, 300-mil 600-mil LH54020ented | |
Pin and Functionally Compatible with
Abstract: lh540206
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OCR Scan |
LH540206 LH540206 Pin and Functionally Compatible with | |
lh540206Contextual Info: LH540206 FEATURES • Fast Access Times: 20/25/35/50/65/80 ns • Fast-Fall-Through Time Architecture Based on CMOS Dual-Port SRAM Technology • Input Port and Output Port Have Entirely Independent Timing • Expandable in Width and Depth • Full, Half-Full, and Empty Status Rags |
OCR Scan |
LH540206 IDT7206 IDT7201 LH5496 LH540201 28-Pin, 300-mil 600-mil LH540206 |