HSP50016 Search Results

fc 0013 downconverter

Abstract: 3 phase generator HSP5 TTL
Contextual Info: HSP50016 Data Sheet File Number Digital Down Converter Features The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a 75 MSPS data rate. The DDC performs down

Contextual Info: HSP50016 Semiconductor Data Sheet January 1999 Digital Down Converter Features The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a 75 MSPS data rate. The DDC performs down

Contextual Info: HSP50016 H A J R R IS S E M I C O N D U C T O R Digital Down Converter January 1994 Features Description • 52 MSPS Input Data Rate The Digital Down Converter DDC is a single chip synthe­ sizer, quadrature mixer and lowpass filter. Its input data is a

Acoustics

Abstract: HI5703 HI5746 HI5766 HSP50016 HSP50016-EV HSP50016GC-52 HSP50016JC-52 HSP50016JC-75
Contextual Info: HSP50016 Data Sheet February 1999 File Number Digital Down Converter Features The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a 75 MSPS data rate. The DDC performs down

32 PIN euro connectors

Abstract: JP17-1 96 pin euro connectors parallel port 25 pin connector U15C HSP50016 HSP50016-EV JP13 JP16-2
Contextual Info: HSP50016-EV TM User’s Manual January 1999 File Number 3637.1 DDC Evaluation Platform Features The HSP50016-EV is the evaluation board for the HSP50016 Digital Down Converter DDC . It provides a mechanism for rapid evaluation and prototyping. The HSP50016-EV consists of a series of busses which provide

HCJ 5B

Contextual Info: HSP50016 HARRIS S E M I C O N D U C T O R Digital Down Converter December 1996 Features Description • 75 MSPS Input Data Rate The Digital Down Converter DDC is a single chip synthe­ sizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a

"dox 10"

Abstract: AN9401 dox 10 decimation filters HSP50016 5625-MHz
Contextual Info: Harris Semiconductor No. AN9401 Harris Digital Signal Processing November 1994 REDUCING THE MINIMUM DECIMATION RATE OF THE HSP50016 DIGITAL DOWN CONVERTER Author: Dr. David B. Chester Introduction This application note discusses a method for reducing the minimum decimation rate of the Harris HSP50016 Digital

AN9401

Abstract: HSP50016 DOX10
Contextual Info: Reducing The Minimum Decimation Factor Of The HSP50016 Digital Down Converter Application Note January 1999 AN9401.1 Introduction each passed to a High Decimation Filter HDF . The decimation factor of the HDFs, denoted R, is programmable from a minimum of 16 to a maximum of 32,768. The outputs

96 pin euro connectors

Abstract: parallel port 25 pin connector euro 96 connector euro connectors euro 96 DIN connector HSP50016 HSP50016-EV JP13
Contextual Info: HSP50016-EV User’s Manual January 1999 File Number 3637.1 DDC Evaluation Platform Features The HSP50016-EV is the evaluation board for the HSP50016 Digital Down Converter DDC . It provides a mechanism for rapid evaluation and prototyping. The HSP50016-EV consists of a series of busses which provide

DOX10

Contextual Info: Reducing The Minimum Decimation Factor Of The HSP50016 Digital Down Converter Application Note January 1999 AN9401.1 Introduction [ /Title AN94 01 /Subject (Reduc ing The Minimum Decimation Factor Of The HSP50 016 Digital Down Converter) /Autho r () /Keywords

"dox 10"

Abstract: AN9401 HSP50016 APPLICATION circuit diagram fir filters
Contextual Info: Reducing The Minimum Decimation Factor Of The HSP50016 Digital Down Converter TM Application Note January 1999 AN9401.1 Introduction The decimation occurs in a two step process. Once the center of the band of interest is shifted to DC by the quadrature modulator, the real and imaginary outputs are

Contextual Info: HSP50016 Ìli H A R R I S S E M I C O N D U C T O R Digital Down Converter June 1994 Features Description • 52 MSPS Input Data Rate The Digital Down Converter DDC is a single chip synthe­ sizer, quadrature mixer and lowpass filter. Its input data is a

Contextual Info: HSP50016-EV Sem iconductor U ser s M a nual J a n u a ry 1999 F ile N u m b e r 3 6 3 7 .1 DDC Evaluation Platform Features The HSP50016-EV is the evaluation board for the HSP50016 Digital Down Converter DDC . It provides a mechanism for rapid evaluation and prototyping. The

Contextual Info: & HSP50016 ADVANCE INFORMATION Digital Down Converter August 1992 Features Description • 75MSPS Input Data Rate The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and low pass filter. It takes a 16 bit input data stream at a 75MSPS data rate, downconverts it, performs narrowband low pass

decimation filters

Abstract: quadrature mixer phase angle magnitude single phase to three phase conversion ic single phase to three phase sign wave generator X band 5-bit phase shifter HSP50016-EV HSP50016JC-52 HSP50016JC-75 HI5703 HI5746
Contextual Info: HSP50016 TM Data Sheet September 2000 File Number Digital Down Converter Features The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a 75 MSPS data rate. The DDC performs down

HI5703

Abstract: HI5746 HI5766 HSP50016 HSP50016-EV HSP50016GC-52 HSP50016JC-52 HSP50016JC-75
Contextual Info: HSP50016 S E M I C O N D U C T O R Digital Down Converter December 1996 Features Description • 75 MSPS Input Data Rate The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a

Contextual Info: HSP50016 TM Data Sheet September 2000 File Number Digital Down Converter Features The Digital Down Converter DDC is a single chip synthesizer, quadrature mixer and lowpass filter. Its input data is a sampled data stream of up to 16 bits in width and up to a 75 MSPS data rate. The DDC performs down

Contextual Info: HSP50016-EV User’s Manual [ /Title HSP5 0016EV /Subject (DDC Evaluation Platform) /Autho r () /Keywords (Intersil Corporation, Semiconductor Downconverters, Tuner, Channelizer, Demod , Demod ulator, DDS) /Creator () /DOCI NFO January 1999 File Number 3637.1

HSP50016

Abstract: HSP50016-EV JP13 JP62 JP16-2
Contextual Info: S E M I C O N D U C T O R HSP50016-EV USER’S MANUAL DDC Evaluation Platform January 1994 Features Description • Single HSP50016-EV may be Used to Evaluate the HSP50016 The HSP50016-EV is the evaluation board for the HSP50016 Digital Down Converter DDC . It provides a mechanism for rapid

application circuit diagram for fir filter

Abstract: 0.13957
Contextual Info: H A Semiconductor iU U S S Reducing The Minimum Decimation Factor Of The HSP50016 Digital Down Converter J a n u a r y 1999 A p p lic a t io n N ote Introduction each passed to a High Decimation Filter HDF . The decimation factor of the HDFs, denoted R, is programmable

HI5702

Abstract: HI5703 HI5746 HI5746EVAL1 HI5746KCA HI5746KCB HI5767
Contextual Info: HI5746 TM Data Sheet February 1999 File Number 4129.4 10-Bit, 40 MSPS A/D Converter Features The HI5746 is a monolithic, 10-bit, analog-to-digital converter fabricated in a CMOS process. It is designed for high speed applications where wide bandwidth and low

HA5020

Abstract: HI5710A HI5710AJCQ Tuner ts pinout
Contextual Info: HI5710A August 2000 Features CT UCT OD U E P R OD t R P ra TE UT OLE UBSTIT rt Cente tsc S B O uppo .com/ LE S SSIB hnical S .intersil O P w A ec FOR act our T IL or ww S t n ER co 8-INT 1-88 10-Bit, 20 MSPS A/D Converter Description • Resolution ±0.5 LSB DNL . . . . . . . . . . . . . . . . . . 10-Bit

circuit diagram for iir and fir filters

Abstract: quantization effects in designing digital filters implementing FIR and IIR digital filters iir filter real time linear convolution application of digital filter 6.5MHz Filter Analog Filter design band pass active filters negative-feedback active filter
Contextual Info: Harris Semiconductor No. AN9603 February 1996 Harris Digital Signal Processing An Introduction to Digital Filters Authors: Dr. David B. Chester, Geoff Phillips, Stan Zepp Introduction General-purpose digital signal microprocessors, now commodity devices, are used in a broad range of applications

sampling

Abstract: sec d 5702 HI5702 HSP43124 HSP43168 HSP43216 HSP43220 HSP45116 HSP50016
Contextual Info: Harris Semiconductor No. AN9509.1 Harris DSP and Data Acq April 1995 Digital IF Sub Sampling Using the HI5702, HSP45116 and HSP43220 Author: Carl Andren and John Fakatselis The carrier frequency ωc is typically much higher than the frequency of the actual baseband signal. The Nyquist criterion