HC192 Search Results

HC193

Abstract: 74LS192 truth table IC 74LS192 74HC192 74LS192 INTERNAL DIAGRAM M54/M74HC192 74LS192 ic 74LS192 PIN diagram data sheet ic 74ls192 HC192
Contextual Info: M54/HC192 M54/M74HC193 HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER . . . . . . . . HIGH SPEED fMAX = 54 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)

HC192

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163D September 1997 - Revised December 2002 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

IC 74LS192

Abstract: HC193 74ls192-193 74LS192 truth table 74HC192 HC192 74LS192 INTERNAL DIAGRAM data sheet ic 74ls192 74LS192 74LS192 PIN diagram
Contextual Info: M54/HC192 M54/M74HC193 HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER . . . . . . . . HIGH SPEED fMAX = 54 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)

CD74HC192

Abstract: CD74HC192E CD74HC193 CD74HC193E CD74HCT193 HC192 HC193
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- HC192, CD74HC193, CD74HCT193 Data sheet acquired from Harris Semiconductor SCHS163 September 1997 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: r z 7 ^7# M54/HC192 MQ[R] a i[LiOlI[HmD(gs_ M54/M74HC193 S G S -T H O M S O N HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER • HIGHSPEED fMAx = 54 MHz (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 4 nA (MAX.) AT TA = 25 °C

Contextual Info: I M54/HC192 M54/74HC193 r z r j S G S -T H O M S O N HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER • LOW POWER DISSIPATION Ice = 4 MAX. at Ta = 25°C ■ HIGH NOISE IMMUNITY V n IH = V n i L = ^ 0/,° ^ CC ( ^ 'n )

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74hc192

Abstract: CD74HC192 application note
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

HC193

Abstract: CD54HC192 CD54HC193 HC192
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163D September 1997 - Revised December 2002 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74HC193 74HCT193

Abstract: CD54HC192F3A CD54HC193F3A HC192 HC193
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

HC192

Contextual Info: _ / S T A 7f SbE D • 7^2=1237 D D M O O l b S2? ■ S 6 T H _ S G S - T H O M S O N M 5 4 /7 4 H C 1 9 2 m m s m E g m » ! _ M 5 4 /7 4 H C 1 9 3 HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74HC193

Abstract: CD54HC192 CD54HC193 HC192 HC193
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163E September 1997 - Revised May 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

HC193

Abstract: CD54HC192F3A CD54HC193F3A HC192
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

IC - 74HC193

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163D September 1997 - Revised December 2002 High Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

CD54HC192F3A

Abstract: CD54HC193F3A HC192 HC193
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

74HC193 74HCT193

Abstract: 74HC192 IC 74HC192 CD54HC192F3A CD54HC193F3A HC192 HC193
Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

Contextual Info: [ /Title CD74 HC192 , CD74 HC193 , CD74 HCT19 3 /Subject (High Speed CMOS Logic Preset- CD54/HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F September 1997 - Revised October 2003 High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters