|
CD74HC107EE4
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 |
|
|
|
CD74HC109E
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
|
|
|
SN74HC10QPWREP
|
|
Texas Instruments
|
Enhanced Product Triple 3-Input Positive-Nand Gates 14-TSSOP -40 to 125 |
|
|
|
SN74HC109DR
|
|
Texas Instruments
|
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 |
|
|
|
CD74HC107M96
|
|
Texas Instruments
|
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 |
|
|
