CY7C1311KV18 Search Results

CY7C1311KV18 Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CY7C1311KV18-250BZC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 18MBIT 250MHZ 165FBGA	Original	PDF		32

CY7C1311KV18 Price and Stock

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Infineon Technologies AG CY7C1311KV18-250BZC IC SRAM 18MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1311KV18-250BZC	Tray			680	1 - 10 - 100 - 1000 $22.72 10000 $22.72	Buy Now
Cypress Semiconductor CY7C1311KV18-250BZC SRAM Chip Sync Dual 1.8V 18M-bit 2M x 8 0.45ns 165-Pin FBGA Tray
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Verical ()	CY7C1311KV18-250BZC		136		25	1 - 10 - 100 $26.25 1000 $23.49 10000 $22.10	Buy Now
	CY7C1311KV18-250BZC		125		25	1 - 10 - 100 $26.25 1000 $23.49 10000 $22.10	Buy Now
Rochester Electronics	CY7C1311KV18-250BZC		261		1	1 - 10 - 100 $21.00 1000 $18.79 10000 $17.68	Buy Now

CY7C1311KV18 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info:  CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture 18-Mbit QDR® II SRAM Four-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	18-Mbit CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 CY7C1311KV18 CY7C1911KV18 CY7C1313KV18	PDF
Contextual Info:  CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture 18-Mbit QDR® II SRAM Four-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	18-Mbit CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 CY7C1311KV18 CY7C1911KV18 CY7C1313KV18	PDF
Contextual Info:  CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1311KV18 – 2 M x 8 ■ 333-MHz clock for high bandwidth	Original	18-Mbit CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 CY7C1311KV18 CY7C1911KV18 CY7C1313KV18 333-MHz	PDF
Contextual Info:  CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture 18-Mbit QDR® II SRAM Four-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 18-Mbit CY7C1311KV18 333-MHz CY7C1313KV18	PDF
Contextual Info:  CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture 18-Mbit QDR® II SRAM Four-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	18-Mbit CY7C1311KV18, CY7C1911KV18 CY7C1313KV18, CY7C1315KV18 CY7C1311KV18 CY7C1911KV18 CY7C1313KV18	PDF
Contextual Info:  CY7C1311KV18/CY7C1911KV18 CY7C1313KV18/CY7C1315KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture 18-Mbit QDR® II SRAM Four-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	CY7C1311KV18/CY7C1911KV18 CY7C1313KV18/CY7C1315KV18 18-Mbit CY7C1311KV18 333-MHz CY7C1313KV18 CY7C1315KV18	PDF