AS7C1026 Search Results

AS7C1026C

Abstract: PCN-08
Contextual Info: Alliance Memory, Inc. 511 Taylor Way, San Carlos, CA 94070 TEL. 650 610-6800 FAX (650) 610-6800 Date: 08/08/08 PCN Tracking Number: PCN-083202 (AS7C1026C-) Product Change Notification Change Description: Describe highlights/features of product change This letter is to serve as a notification of a product change for Alliance Memory part number

Contextual Info: March 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging

12-BI

Contextual Info: May 2001 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging

AS7C31026

Contextual Info: 2&72% 5#4<<<# $6:&4359 $6:&64359 8926169#97.ð49#&026#65$0 HDWXUHV • AS7C1026 (5V version) • AS7C31026 (3.3V version) • Industrial and commercial versions • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise • High speed

AS7C1026A

Abstract: AS7C1026A-10 AS7C31026A AS7C31026A-10
Contextual Info: May 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging • AS7C1026A 5V version

TAA 621

Abstract: MD 202 TAA 621 applications AS7C1026-15JC AS7C1026 AS7C31026 7C1026 AS7C31026-25JC AS7C1026-25JC J-Squared Technologies
Contextual Info: High Performance 64Kx16 CMOS SRAM AS7C1026 AS7C31026 64K×16 CMOS SRAM Preliminary information Features • Organization: 65,536 words × 16 bits • High speed - 12/15/20/25 ns address access time - 6/8/10/12 ns output enable access time • Low power consumption

Contextual Info: AS7C1026 AS7C31026 X 5V/3.3V 64Kx 16 CMOS SRAM Features • Organization: 65,536 words x 16 bits • High speed - 1 0 / 1 2 /1 5 / 2 0 ns address access time - 5 / 5 / 8 / 1 0 ns output enable access time • Low power consumption - Active: 770 mW max 20 ns cycle, 5V

AS7C1026A

Abstract: AS7C31026A
Contextual Info: May 2002 AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • AS7C1026A 5V version • AS7C31026A (3.3V version) • Industrial and commercial versions • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise • High speed

Contextual Info:  $6& $6& 99.ð&02665$0 HDWXUHV • TTL-compatible, three-state I/O • 44-pin JEDEC standard package - 400 mil SOJ - 400 mil TSOP II • Upward compatibility - 64Kx16 AS7C1026) - 256K×16 (AS7C4098) • Center power and ground pins

RBS 6000

Abstract: AS7C1026 AS7C1026-12 AS7C1026-15 AS7C1026-20 AS7C31026 AS7C31026-10 AS7C31026-12 AS7C31026-15 AS7C31026-20
Contextual Info: May 2000 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O

Contextual Info: August 2000 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O

Contextual Info: September 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • AS7C1026A 5V version • AS7C31026A (3.3V version) • Industrial and commercial versions • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise

Contextual Info: June 2003 Preliminary Information AS7C1026B 5 V 64K X 16 CMOS SRAM • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging Features • Product AS7C1026B • Industrial and commercial versions • Organization: 65,536 words x 16 bits

RBS 6000

Abstract: AS7C31026 AS7C1026
Contextual Info: September 2001 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM Features • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O

AS7C1026C

Contextual Info: September 2006 Advance Information AS7C1026C 5 V 64K X 16 CMOS SRAM • Industrial -40o to 85oC temperature • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise • High speed - 15 ns address access time - 6 ns output enable access time

AS7C1026A

Abstract: AS7C31026A
Contextual Info: March 2002 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • AS7C1026A 5V version • AS7C31026A (3.3V version) • Industrial and commercial versions • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise

AS7C1026

Abstract: AS7C1026-12 AS7C31026 TBA 315
Contextual Info: November 2000 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O

AS7C31026

Abstract: AS7C1026
Contextual Info: August 2000 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O

Contextual Info: May 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging • AS7C1026A 5V version

AS7C1026C

Contextual Info: September 2006 Advance Information AS7C1026C 5 V 64K X 16 CMOS SRAM Features • JEDEC standard packaging - 44-pin 400 mil SOJ - 44-pin TSOP 2-400 • ESD protection ≥ 2000 volts Pin arrangement A7 I/O0–I/O7 I/O8–I/O15 Control circuit Address decoder

AS7C1026A

Abstract: AS7C1026A-10 AS7C31026A
Contextual Info: January 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging

Contextual Info: H igh Performance 64K X16 CMOS SRAM AS7C1026 AS7C31026 64K X I6 CMOS SRAM Preliminary information Features • Organization: 65,536 words x 16 bits • High speed - 1 2 /1 5 /2 0 /2 5 ns address access time - 6 /8 /1 0 /1 2 ns output enable access time • Low power consumption

Contextual Info: AS7C1026 AS7C31026 5V/3.3V 64Kx 16 CMOS SRAM Features • O ig a n iz a tio n : 6 5 ,5 3 6 w o i d s x 1 6 b i s • H ig h ç œ d - 1 2 / 1 5 / 2 0 / 2 5 n s a d d i e s s access tim. e - 5 / 5 / 6 / 7 n s o u t p u t e n a b le access tin e • Low p o w e r c o n su m p tio n

Contextual Info: August 2001 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging