AD6672 Search Results

frequency mulitiplexer

Abstract: AN-835 ANSI-644 JESD51-2 7000 jb1
Contextual Info: IF Receiver AD6672 FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ VIN– PIPELINE ADC AGND 14 DRVDD NOISE SHAPING REQUANTIZER VCM AD6672 11 DCO± REFERENCE SDIO D9±/D10± OR± 1-TO-8 CLOCK DIVIDER SERIAL PORT SCLK 0/D0± CSB CLK+ CLK– 09997-001 Performance with NSR enabled

EPS060250UH-PHP-SZ

Abstract: j301
Contextual Info: Quick Start Guide for testing the AD6672 Analog-to-Digital Converter ADC Customer Evaluation Board Using the FPGA based Capture Board HSC-ADC-EVALCZ Figure 1: AD6672 Evaluation Board with HSC-ADC_EVALCZ Data Capture Board Equipment Needed ► Analog signal source and anti-aliasing filter

Contextual Info: IF Receiver AD6672 Data Sheet FEATURES GENERAL DESCRIPTION 11-bit, 250 MSPS output data rate Performance with NSR enabled SNR: 75.2 dBFS in a 55 MHz band to 185 MHz at 250 MSPS SNR: 72.8 dBFS in an 82 MHz band to 185 MHz at 250 MSPS Performance with NSR disabled

Contextual Info: IF Receiver AD6672 Data Sheet FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ VIN– PIPELINE ADC AGND 14 DRVDD NOISE SHAPING REQUANTIZER VCM AD6672 11 DCO± D9±/D10± OR± REFERENCE 1-TO-8 CLOCK DIVIDER SERIAL PORT SCLK 0/D0± SDIO CSB CLK+ CLK– 09997-001 11-bit, 250 MSPS output data rate

Contextual Info: IF Receiver AD6672 FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ VIN– PIPELINE ADC AGND 14 DRVDD NOISE SHAPING REQUANTIZER VCM AD6672 11 DCO± D9±/D10± OR± REFERENCE 1-TO-8 CLOCK DIVIDER SERIAL PORT SCLK 0/D0± SDIO CSB CLK+ CLK– 09997-001 Performance with NSR enabled

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 71.0 dBFS at 185 MHz AIN and 250 MSPS SFDR = 83 dBc at 185 MHz AIN and 250 MSPS −152.0 dBFS/Hz input noise at 200 MHz, −1 dBFS AIN, 250 MSPS Total power consumption: 390 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

CP-32-12

Contextual Info: 14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter ADC AD9642 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD VIN+ PIPELINE 14-BIT ADC VIN– VCM AGND DRVDD D0±/D1± 14 PARALLEL DDR LVDS AND DRIVERS AD9642 D12±/D13± DCO± REFERENCE 1-TO-8 CLOCK

Contextual Info: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9634 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ PIPELINE 12-BIT ADC VIN– VCM AGND DRVDD 12 D0±/D1± PARALLEL DDR LVDS AND DRIVERS AD9634 REFERENCE . . . D10±/D11± DCO± OR± 1-TO-8

A817

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 69.7 dBFS at 185 MHz AIN and 250 MSPS SFDR = 87 dBc at 185 MHz AIN and 250 MSPS −150.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 360 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

ANSI-644

Contextual Info: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9634 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ PIPELINE 12-BIT ADC VIN– VCM AGND DRVDD 12 D0±/D1± PARALLEL DDR LVDS AND DRIVERS AD9634 REFERENCE . . . D10±/D11± DCO± OR± 1-TO-8

ANSI-644

Abstract: AD9634
Contextual Info: 14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter ADC AD9642 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ PIPELINE 14-BIT ADC VIN– VCM AGND DRVDD D0±/D1± 14 AD9642 PARALLEL DDR LVDS AND DRIVERS D12±/D13± DCO± REFERENCE 1-TO-8 CLOCK