8B/10B ENCODER Search Results

Marvell fibre copper

Abstract: marvell alaska marvell IEEE
Contextual Info: Transceiver Solutions Alaska X 10GBASE-CX4 Transceiver 88X2088 PRODUCT OVERVIEW Dev. 4 PHY XGXS L0 L1 L2 L3 L0 L1 L2 L3 LASI Deserializer 8B/10B Decoder FIFO Dev. 3 PCS 8B/10B Encoder Serializer 8B/10B Encoder FIFO 8B/10B Decoder LASI MDC MDIO INTn Management

lattice machxo lcmxo1200c

Abstract: 8B10B LC51024MB-52F484C LCMXO1200C-3T100C LFECP6E-5T144C LFXP2-5E-5M132C RD1012 K2801 set-3b k2371
Contextual Info: 8b/10b Encoder/Decoder June 2010 Reference Design RD1012 Introduction Many serial data transmission standards utilize 8b/10b encoding to ensure sufficient data transitions for clock recovery. This reference design describes an encoder/decoder suitable for performing 8b/10b encoding/decoding

8B10B

Abstract: LFX1200B-03FE680C RD1012 8B10B ansi encoder KXY 23 lc4128v-5t100c K2371
Contextual Info: 8b/10b Encoder/Decoder November 2002 Reference Design RD1012 Introduction Many serial data transmission standards utilize 8b/10b encoding to ensure sufficient data transitions for clock recovery. This reference design describes an encoder/decoder suitable for performing 8b/10b encoding/decoding

8B10B

Abstract: 2D212
Contextual Info: HammerCores by Altera White Paper 8b/10b Encoders Introduction The 8b/10b encoders and decoders are used for physical layer coding for Gigabit Ethernet IEEE 802.3 , Fibre Channel, and other applications. The 8b/10b encoder takes byte inputs, and generates a DC balanced stream (equal

80C31 instruction set

Abstract: xc2s200 pq208 xilinx code for 8-bit serial adder dvb-RCS transmitter XC2S50 driver PIC Microcontroller GSM Modem POS-PHY ATM format dvb-RCS modulator uart 16450 128-bit key generation matlab code for image enc
Contextual Info: XILINX IP SELECTION GUIDE Implementation Example Function Communication & Networking BUFE-based Multiplexer Slice 3G FEC Package 3GPP Compliant Turbo Convolutional Decoder 3GPP Compliant Turbo Convolutional Encoder 3GPP Turbo Decoder 8b/10b Decoder 8b/10b Encoder

528-58

Abstract: A54SX16 A54SX16-2 AC135 VQ100 K28-1 pd6bc
Contextual Info: Application Note AC135 Implementing an 8b/10b Encoder/Decoder for Gigabit Ethernet in the Actel SX FPGA Family Introduction This application note describes how an Actel A54SX16 FPGA was used to implement an 8b/10b encoder/decoder function for a Gigabit Ethernet router.

88X2040

Abstract: MARVELL 88X2010 88X2011 MARVELL "XAUI to XFI" 1031-25 optical encoder module
Contextual Info: Transceiver Solutions Alaska X 10 Gigabit Ethernet and 10 Gigabit Fibre Channel LAN/WAN Transceivers 88X2010/88X2011 PRODUCT OVERVIEW L0_RXP/N L1_RXP/N L2_RXP/N L3_RXP/N L0_TXP/N L1_TXP/N L2_TXP/N L3_TXP/N 8B/10B Decoder FIFO 64B/66B Encoder 8B/10B Encoder

xc3s50atq144

Abstract: xc5vlx20t-ff323 xc3s50a-tq144 8B10B ansi encoder 8b/10b encoder vol encoder XAPP1112 XAPP1122 vhdl code for clock and data recovery
Contextual Info: Application Note: Virtex-5, Virtex-4, Virtex-II, Virtex-II Pro, Spartan-3, Spartan-3E, Spartan-3A/3A DSP R Parameterizable 8b/10b Encoder Author: Paula Vo XAPP1122 v1.1 November 10, 2008 Summary This application note describes a parameterizable 8b/10b Encoder, and is accompanied by a

CY7B923

Abstract: CY7B933 CY7C42X5 CY7C924ADX
Contextual Info: CY7C924ADX 200 MBaud HOTLink Transceiver Features • Second generation HOTLink® technology • Fibre Channel and ESCON® compliant 8B/10B encoder/decoder • 10 or 12 bit preencoded data path raw mode • 8 or 10 bit encoded data transport (using 8B/10B coding)

32C05

Abstract: CY7B923 CY7B933 CY7C42X5 CY7C924ADX CY7C924ADX-AI
Contextual Info: CY7C924ADX 200 MBaud HOTLink Transceiver Features • Second generation HOTLink® technology • Fibre Channel and ESCON® compliant 8B/10B encoder/decoder • 10 or 12 bit preencoded data path raw mode • 8 or 10 bit encoded data transport (using 8B/10B coding)

0D100

Abstract: pd6bc
Contextual Info: Appl i cat i o n N ot e Implementing an 8b/10b Encoder/Decoder for Gigabit Ethernet in the Actel SX FPGA Family Introduction This application note describes how an Actel A54SX16 FPGA was used to implement an 8b/10b encoder/decoder function for a Gigabit Ethernet router.

xc3s50atq144

Abstract: xc3s50a-tq144 xc5vlx20t-ff323 XAPP1112 XAPP1122 vhdl ethernet spartan 3a 16 word 8 bit ram using vhdl K27 v6 K28-1
Contextual Info: Application Note: Virtex-5, Virtex-4, Virtex-II, Virtex-II Pro, Spartan-3, Spartan-3E, Spartan-3A/3A DSP R Parameterizable 8b/10b Decoder Author: Paula Vo XAPP1112 v1.1 November 10, 2008 Summary This application note describes a parameterizable 8b/10b Decoder, and is accompanied by a

Contextual Info: f PRELIMINARY CYPRESS C Y 7 C 92 4D X 200 MBaud HOTLink Transceiver Features Second generation HOTLink™ technology Fibre Channel and ESC O N com pliant 8B /10B encoder/decoder 10- or 12-bit pre-encoded data path raw m ode 8- o r 10-bit encoded data transport (using 8B/10B

Contextual Info: Application Layer Transport Layer Physical Layer Data Link Layer Transmitter Block Tx Application Layer SYSREF optional SYNC~ Device Clock Data Framing Frame/Lane Alignment Character Generation Scrambler (Optional) 8b/10b Encoder Serializer Tx Driver High

Contextual Info: Advance Product Information Gigabit Interconnect Chip VSC7211 Features • ANSI X3T11 Compatible Fibre Channel Transceiver • 8B/10B Encoder/Decoder • Deskewing of +/- 2 Bits Cable Skew at the Receiver Across Multiple Chips • Compatible with VS C7214

Contextual Info: SEMICONDUC TOR CORPORATION Advance Product Information Gjgabjt lnterconnect chip VSC7211 Features • ANSI X 3T11 Compatible Fibre Channel Transceiver • 8B/10B Encoder/Decoder • Deskewing of +/- 2 Bits Cable Skew at the Receiver Across Multiple Chips • Compatible with VSC7214

CY7B923

Abstract: CY7C42X5 CY7C954ADX ASC CAPACITOR 29C04
Contextual Info: CY7C954ADX ATM HOTLink Transceiver Framer Deserializer Decoder 8B/10B HOTLink devices are ideal for a variety of applications where parallel interfaces can be replaced with high-speed, point-topoint serial links. Some applications include interconnecting

lr2 d13

Abstract: vsc7107 D174A LR3 D13 30PFL
Contextual Info: VSC7107 Preliminary Data Sheet High Performance Encoder/Decoder for Fibre Channel or Proprietary Serial Links Features • Full ANSI X3T11 Fibre Channel FC Compatibility Simplex (100 MByte/s) or Duplex (200 MByte/s) Mode Operation • 8B/10B Encoding/Decoding

5D215

Contextual Info: VITESSE VSC7107 Preliminary Data Sheet High Performance Encoder/Decoder for Fibre Channel or Proprietary Serial Links Features • Full ANSI X 3T11 Fibre Channel FC Compatibility • 8B/10B Encoding/Decoding • 32 or 16 bit Synchronous FIFO System Interface

Contextual Info: PM8358 QuadPHY 10GX Preliminary 10GbE and 10GFC Compliant Transceiver • Wide operating range from 1.2 Gbit/s 3.2 Gbit/s enables backward compatibility • Integrated serializer/deserializer, clock synthesis, clock recovery and 8B/10B encode/decode logic.

37-c4

Abstract: CY7B933 CY7C924DX CYP15G0401DX CYP15G0403DX SA22 K28730 Clock Generators Code "A06" RF Semiconductor 4bit LFSR
Contextual Info: PRELIMINARY CYP15G0403DX Independent Clocking Quad HOTLink II Transceiver Features — copper cables • Second-generation HOTLink technology • Fibre-Channel- and Gigabit-Ethernet-compliant 8B/10B-coded or 10-bit unencoded • Four independent channels

89HPES12N3

Abstract: 89HPES12N3Y
Contextual Info: 89HPES12N3 Data Sheet 12-lane 3-Port PCI Express Switch Device Overview Highly Integrated Solution – Requires no external components – Incorporates on-chip internal memory for packet buffering and queueing – Integrates 12 2.5 Gbps embedded SerDes, 8B/10B encoder/

89PES12N3

Abstract: serdes 8b 10b
Contextual Info: 89PES12N3 Product Brief 12 Lane 3-Port PCI Express Switch Device Overview Highly Integrated Solution – Requires no external components – Incorporates on-chip internal memory for packet buffering and queueing – Integrates 12 2.5 Gbps embedded SerDes, 8B/10B encoder/

89HPES12N3YCBC

Abstract: PES12
Contextual Info: 89HPES12N3 Data Sheet 12-lane 3-Port PCI Express Switch ® Device Overview Highly Integrated Solution – Requires no external components – Incorporates on-chip internal memory for packet buffering and queueing – Integrates 12 2.5 Gbps embedded SerDes, 8B/10B encoder/