8-BIT SCHOTTKY DIODE Search Results

74F1056

Abstract: 74F1056SC M16A 8-bit schottky diode
Contextual Info: Revised August 1999 74F1056 8-Bit Schottky Barrier Diode Array General Description Features The 74F1056 is an 8-bit Schottky barrier diode array designed to be employed as termination on the inputs to memory bus lines or CLOCK lines. This device is designed

74F1056

Abstract: M16A 74F1056SC
Contextual Info: 74F1056 8-Bit Schottky Barrier Diode Array General Description The ’F1056 is an 8-bit Schottky barrier diode array designed to be employed as termination on the inputs to memory bus lines or CLOCK lines. This device is designed to suppress negative transients caused by line reflections, switching

Contextual Info: SN74S1056 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY _SDLS019B- APRIL 1990 - REVISED JULY 1997 Designed to Reduce Reflection Noise SC PACKAGE TOP VIEW Repetitive Peak Forward Current 300 mA 8-Bit Array Structure Suited for Bus-Oriented Systems

MB71A38

Contextual Info: FU JITSU PROGRAMMABLE SCHOTTKY 1 63 84 -B IT READ ONLY MEMORY MB71 A 3 8 -2 5 M B 7 1 A 3 8 -3 5 August 1988 Edition 2.0 SCHOTTKY 16384-BIT DEAP PROM 2048 WORDS X 8 BITS The Fujitsu MB71A38 is high speed schottky TTL electrically field programmable read

diode D07-15 54

Contextual Info: SN74F1056 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDFS085 - AUGUST 1992 • Designed to Reduce Reflection Noise • Repetitive Peak Forward Current. . . 300 mA • 8-Bit Array Structure Suited for Bus-Oriented Systems SC PACKAGE TOP VIEW D01 D02

S1 DIODE schottky

Abstract: SN74F1056
Contextual Info: SN74F1056 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDFS085 – AUGUST 1992 • • • SC PACKAGE TOP VIEW Designed to Reduce Reflection Noise Repetitive Peak Forward Current . . . 300 mA 8-Bit Array Structure Suited for Bus-Oriented Systems D01

Contextual Info: April 1990 Edition 2 .0 FUJITSU DATA S H E E T MB7112E-W/7112L-W PROGRAMMABLE SCHOTTKY 256-BIT READ ONL Y MEMORY SCHOTTKY 256-BIT DEAP PROM 32 WORDS x 8 BITS The Fujitsu MB7112-W is high speed Schottky TTL electrically field programmable read only memory organized as 32 words by 8-bits. With three-state outputs on the MB7112-W memory

Contextual Info: „ . Revised A ugust 1999 s e m ic o n d u c to r 74F1056 8-Bit Schottky Barrier Diode Array General Description Features The 74F1056 is an 8-bit Schottky b arrier diode array designed to be em ployed as term ination on the inputs to m em ory bus lines or C LO C K lines. This device is designed

Contextual Info: SN74F1056 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDFS085A – AUGUST 1992 – REVISED JULY 1997 D D D SC PACKAGE TOP VIEW Designed to Reduce Reflection Noise Repetitive Peak Forward Current 300 mA 8-Bit Array Structure Suited for Bus-Oriented Systems

Contextual Info: SN74S1056 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS019B – APRIL 1990 – REVISED JULY 1997 D D D SC PACKAGE TOP VIEW Designed to Reduce Reflection Noise Repetitive Peak Forward Current 300 mA 8-Bit Array Structure Suited for Bus-Oriented Systems

Contextual Info: November 1990 Edition 3.0 FUJITSU DATA SHEET MB7117E/H/7118E/H/7117L/7118L PROGRAMMABLE SCHOTTKY2048 READ ONLY MEMORY SCHOTTKY 2048-BIT DEAP PROM 256 WORDS x 8 BITS The Fujitsu MB7117 and MB7118 are high speed schottky TTL electrically field programmable

Contextual Info: S E M I C O N D U C T O R -n 74F1056 8-Bit S chottky B arrier Diode A rray General Description The ’ F1056 is an 8-bit Schottky barrier diode array designed to be employed as termination on the inputs to memory bus lines or CLOCK lines. This device is designed to suppress

7144 transistor

Abstract: Fujitsu proms 7144Y
Contextual Info: FU JITSU Bipolar Memories • MB7143E/H, MB7144E/H/Y Programmable Schottky 65,536-Bit Read Only Memory 8,192 Words x 8-Bits Description The Fujitsu MB7143 (open collector) and MB7144 (three-state) are high-speed Schottky TTL electrically field programmable read-only

948F

Abstract: MC74VHCT259A MC74VHCT259AD MC74VHCT259ADR2 MC74VHCT259ADT VHC259 VHCT259A
Contextual Info: MC74VHCT259A 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter with LSTTL–Compatible Inputs The MC74VHCT259 is an 8–bit Addressable Latch fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS

Contextual Info: FUJITSU MB MB MB MB PROGRAMMABLE SCHOTTKY 2048 READ ONLY MEMORY 7117E/H 7118E/H 7117L 7118L June 1987 Edition 2.0 SCHOTTKY 2048 BIT DEAP PROM 256 WORDS X 8 BITS The Fujitsu MB 7117 and MB 7118 are high speed sch ottky T T L e lectrically fie ld programmable read only memories organized as 256 words by 8-bits.

MB7132E

Abstract: b7131 mb7132 LSK Series MB7132Y
Contextual Info: FUJITSU PROGRAMMABLE SCHOTTKY 8192-BIT READ ONLY MEMORY M B7131E/H/L M B7132E/H/Y/L MB7131E-SK/H-SK/L-SK M B7132E-SK/H -SK/Y-SK/L-SK I January 19B8 E d itio n 2.0 SCHOTTKY 8192-BIT DEAP PROM 1024 WORDS X 8 BITS The Fujitsu MB 7131 and MB 7132 are high speed sch ottky T T L electrically

AN 7112E

Contextual Info: FUJITSU MICROELECTRONICS F U JIT SU 53E D 3 7 417b2 PROGRAMMABL SCHOTTKY? 256!-B ll READ?ONÜfMEMOR’ QQDÖ737 MB MB MB MB ñ 7111E/H 7112E/H/Y 7111L 7112L March 1986 Edition 2.0 SCHOTTKY 256 BIT DEAP PROM 32 WORDS x 8 BITS The Fujitsu MB 7111 and MB 7112 are high speed Schottky T T L electrically

Contextual Info: MC74VHCT259A 8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs http://onsemi.com The MC74VHCT259 is an 8−bit Addressable Latch fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS

948F

Abstract: DL203 MC74VHC595 MC74VHCXXXDT MC74VHCXXXM VHC595
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Bit Shift Register with Output Storage Register MC74VHC595 3-State The MC74VHC595 is an advanced high speed 8–bit shift register with an output storage register fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky

74LS377

Abstract: 74ls175 pin diagram 74LS174 74LS175 74LS378 74LS379 motorola ceramic dual in-line case 74ls377 motorola
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

ls378

Abstract: 74LS377 74LS174 74LS175 74LS378 74LS379
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

B714

Abstract: 7142E 7141E IC 7142
Contextual Info: FU JITSU B ipolar M em ories • M B 7141E /H , M B 7142E /H Programmable Schottky 32,768-Bit Read Only Memory 4,096 Words x 8-Bits D e s c rip tio n T he Fujitsu MB7141 (open collector) and MB7142 (three-state) are high-speed, Schottky T T L electrically field program m able read-only

74ls189 ram

Abstract: precon po
Contextual Info: " I — Jk ^ ’g T g ^ 1— mk ^ Page 0001 0 1 /1 6 /8 9 11:16:37 Tx: AM27LS03 TED - Ft: A V O PMT woniNMMSflnncMiMCa Am27LS03 64-Bit Low-Power Inverting-Output Bipolar RAM > 3 ro DISTINCTIVE CHARACTERISTICS Fully decoded 16 word x 4-bit low-power Schottky

precon sea

Abstract: ls 07
Contextual Info: 2 1 1991 Page 0001 1 1/2 8/88 15:41:31 Tx: AM27LS07 TED - Ft: AMO FMT Am 2 7 LS0 7 £1 64-Bit Low-Power Noninverting-Output Bipolar RAM DISTINCTIVE CHARACTERISTICS Fully decoded 16-word x 4-bit low-power Schottky RAMs Internal ECL circuitry for optimum speed/power performane* over voltage and temperature