8 TO 64 DECODER Search Results

Contextual Info: CY14C064PA CY14B064PA CY14E064PA 64-Kbit 8 K x 8 SPI nvSRAM with Real Time Clock 64-Kbit (8 K × 8) SPI nvSRAM with Real Time Clock Features 64-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 8 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated

Contextual Info: CY14MB064J1A/CY14MB064J2A CY14ME064J1A/CY14ME064J2A 2 PRELIMINARY 64-Kbit 8 K x 8 Serial (I C) nvSRAM 64-Kbit (8 K × 8) Serial (I2C) nvSRAM Features • 64-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 8 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated

Contextual Info: CY14C064PA CY14B064PA CY14E064PA 64-Kbit 8 K x 8 SPI nvSRAM with Real Time Clock 64-Kbit (8 K × 8) SPI nvSRAM with Real Time Clock Features 64-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 8 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated

CY14MX064Q2A

Contextual Info: CY14MB064Q CY14ME064Q 64-Kbit 8 K x 8 SPI nvSRAM 64-Kbit (8 K × 8) SPI nvSRAM Features • ■ ■ 64-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 8 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI

Contextual Info: CY14MB064Q CY14ME064Q 64-Kbit 8 K x 8 SPI nvSRAM 64-Kbit (8 K × 8) SPI nvSRAM Features • ■ 64-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 8 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI

Contextual Info: CY14C512Q CY14B512Q CY14E512Q 512-Kbit 64 K x 8 SPI nvSRAM 512-Kbit (64 K × 8) SPI nvSRAM Features • ■ 512-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 64 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated

Contextual Info: CY14C512J CY14B512J CY14E512J 512-Kbit 64 K x 8 Serial (I2C) nvSRAM 512-Kbit (64 K × 8) Serial (I2C) nvSRAM Features • 512-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 64 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated

ProVidia

Abstract: TGUI9680
Contextual Info: / Tridenti ProVidia9685' Product Brief 64 BIT GUI & Video Accelerator with TV Display Features 64 Bit High Performance GUI Accelerator • Two wire interface to EEPROM or VESA DDC • 64 bit internal/external memory data bus • 265 Raster Operations ROPs for 8 bits per pixel

Contextual Info: CY14B512Q1 CY14B512Q2 CY14B512Q3 512-Kbit 64 K x 8 Serial (SPI) nvSRAM Features • ■ 512-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 64 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by user using

89c51rd2 application notes

Contextual Info: T89C51RD2 0 to 40MHz Flash Programmable 8-bit Microcontroller 1. Description TEMIC T89C51RD2 is high performance CMOS Flash version of the 80C51 CMOS single chip 8-bit microcontroller. It contains a 64 Kbytes Flash memory block for program and for data. The 64 Kbytes Flash memory can be programmed either

AT52BR6408A

Contextual Info: Stack Module Features • • • • 64-Mbit Flash + 8-Mbit SRAM Power Supply of 2.7V to 3.1V Data I/O x16 66-ball CBGA Package 64-Mbit Flash Features • 64-megabit 4M x 16 Flash Memory • 2.7V - 3.1V Read/Write • High Performance • • • • •

AT52BC6402A

Abstract: AT52BC6402AT 3B8000
Contextual Info: Stack Module Features • • • • 64-Mbit Flash + 16-Mbit PSRAM Power Supply of 2.7V to 3.1V Data I/O x16 66-ball CBGA Package: 8 x 11x 1.0 mm 64-Mbit Flash Features • 64-megabit 4M x 16 Flash Memory • 2.7V - 3.1V Read/Write • High Performance

AT52BC6402A

Abstract: AT52BC6402AT 66C6 sa103 transistor
Contextual Info: Stack Module Features • • • • 64-Mbit Flash + 16-Mbit PSRAM Power Supply of 2.7V to 3.1V Data I/O x16 66-ball CBGA Package: 8 x 11x 1.0 mm 64-Mbit Flash Features • 64-megabit 4M x 16 Flash Memory • 2.7V - 3.1V Read/Write • High Performance

cfi commands

Abstract: A0-A21 J-STD-020B M36W0R6030B0 M36W0R6030T0
Contextual Info: M36W0R6030T0 M36W0R6030B0 64 Mbit 4Mb x16, Multiple Bank, Burst Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package FEATURES SUMMARY MULTI-CHIP PACKAGE – 1 die of 64 Mbit (4Mb x 16) Flash Memory – 1 die of 8 Mbit SRAM • SUPPLY VOLTAGE – VDDF = VDDQ = VDDS = 1.7 to 1.95V

80287 microprocessor block diagram and pin diagram

Contextual Info: irrtel' MILITARY 387 SX MATH COPROCESSOR Military • Interfaces with Military 3 8 6 tm SX Microprocessor ■ Expands Military 386 SX CPU Data Types to Include 32-, 64-, 80-Bit Floating Point, 32-, 64-Bit Integers and 18-Digit BCD Operands ■ High Performance 80-Bit Internal

Contextual Info: M24C64S-FCU 64-Kbit serial I²C bus EEPROM 4 balls CSP Datasheet - preliminary data Features • Compatible with the 400 kHz I²C protocol • Memory array: – 64 Kbits 8 Kbytes of EEPROM – Page size: 32 bytes • Supply voltage range: – 1.7 V to 5.5 V

MT41K128M16

Abstract: MT41K512M4
Contextual Info: 2Gb: x4, x8, x16 DDR3L SDRAM Addendum Description 1.35V DDR3L SDRAM Addendum MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C

circuit diagram of queuing with seven segment

Abstract: CCW15 101ZZ MC68377 8127 ANX11 ANX8 detector mq2 MC14051 QADC64
Contextual Info: SECTION 8 QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64 MC68377 includes one independent queued analog-to-digital converter QADC64 module. 8.1 Overview The QADC64 modules consist of an analog front-end and a digital control subsystem, which includes an intermodule bus (IMB3) interface block. Refer to Figure 8-1.

Contextual Info: ADVANCE INFORMATION AMD3 Am30LV0064D 64 Megabit 8 M x 8-Bit CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology DISTINCTIVE CHARACTERISTICS • Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations

AM30LV0064D

Abstract: AM30LV0064DJ40 et102
Contextual Info: Back ADVANCE INFORMATION Am30LV0064D 64 Megabit 8 M x 8-Bit CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology DISTINCTIVE CHARACTERISTICS • Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations

mt47h128m16

Contextual Info: 2Gb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H512M4 – 64 Meg x 4 x 8 banks MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks For the latest data sheet, refer to Micron’s Web site: www.micron.com/ddr2 Features • • •

MT41K512M8RH-125

Abstract: 256M16
Contextual Info: 4Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K1G4 – 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C

DDR3L-1866

Abstract: MT41K256M16 MT41K1G4 MT41K512M8 901KB 96-ball FBGA 512M8 micron FBGA SDRAM
Contextual Info: 4Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K1G4 – 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C

DDR3L-1066

Abstract: DDR3L-800 78-Ball TIS87
Contextual Info: 2Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C