7Z93 Search Results

74ch

Abstract: HCT373 74HC 74HCT S020 sot146i 74cht
Contextual Info: 74H C/H CT373 MSI OCTAL D-TYPE TRANSPARENT LATCH; 3-STATE FE A TU R E S T Y P IC A L • • • • • 3*state non-inverting outputs for bus oriented applications Common 3-state output enable input Functionally identical to the " 5 6 3 " " 5 7 3 " and " 5 3 3 ”

74HC

Abstract: 74HCT HCT393
Contextual Info: 74HC/HCT393 MSI DUAL 4-BIT BIN A R Y RIPPLE COUNTER FEATURES • • • • • TYPICAL Two 4-bit binary counters with individual clocks Divide-by any binary module up to 28 in one package Two master resets to clear each 4-bit counter individually Output capability: standard

CMOS 4000B series device

Abstract: 4000B 74HC 74HCT
Contextual Info: 7 4H C /H CT40103 ^J _MSI 8-BIT SYNCHRONOUS B IN A R Y DOWN COUNTER FEATURES • • • • Cascadable Synchronous o r asynchronous preset Output capability: standard •cc category: MSI SY M B O L G ENERAL DESCRIPTION The 7 4 H C /H C T 4 0 1 0 3 consist each o f

HCT273

Abstract: 74HC 74HCT S020
Contextual Info: 74HC/HCT273 MSI OCTAL D-TYPE FLIP-FLOP W ITH RESET; POSITIVE-EDGE TRIGGER F E A TU R E S • • • • • • • • T Y P IC A L Ideal buffer for MOS microprocessor or memory Common clock and master reset Eight positive edge-triggered D-type flip-flops

NSP 233

Abstract: D15114
Contextual Info: 74HC/HC T112 flip-flops DUAL JK FLIP-FLOP W ITH SET AND RESET; NEGATIVE-EDGE TRIGGER FEATURES TYPICAL • Asynchronous set and reset • Output capability: standard • IQ0 category: flip-flops PARAMETER SYMBOL U NIT CONDITIONS HC HCT 17 15 18 19 15 19 ns

MAX5974

Contextual Info: 74HC/HCT163 MSI PRESETTABLE SYNCHRONOUS 4-BIT B INA RY COUNTER; SYNCHRONOUS RESET FE A T U R E S • • • • • • TYPICAL Synchronous counting and loading Tw o count enable inputs for n-bit cascading Positive-edge triggered clock Synchronous reset O u tput capability: standard

IC 4051

Contextual Info: 74HC/HCT4051 MSI 8-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER FEATURES • • TYPICAL Wide analog input voltage range: ± 5 V. Low "O N " resistance: 80 typ. at V c c - V EE = 4.5 V 70 n (typ.) at V q q — V EE = 6.0 V 60 (typ.) at V c c - V EE = 9.0 V Logic level translation:

5 to 32 decoder using 4 t0 16 decoders

Abstract: 74HC-HCT138
Contextual Info: 74H C/H CT138 MSI 3-TO-8 LINE DECODER/DEMULTIPLEXER; INVERTING FEATU RES • • T Y P IC A L D em ultiplexing capability Ideal fo r m em ory chip select decoding U N IT C O N D IT IO N S HC Active LO W m utually exclusive outputs • O u tp u t capability: standard

full adder ic number

Abstract: ic pin configuration binary adder
Contextual Info: 74HC/HCT283 MSI 4-BIT B IN A R Y FU LL A D D E R WITH FA ST C A R R Y FEA TU RES • • • • • T Y P IC A L High-speed 4-bit binary addition Cascadable in 4-bit increments Fast internal look-ahead carry Output capability: standard *CC category: MS* G E N E R A L D E S C R IP T IO N

74HCT

Contextual Info: 74HC/HCT4075 TRIPLE 3-INPUT OR GATE FEATURES • • TYPICAL O u tp u t c a p a b ility : standard 1q £ category: SSI G E N E R A L D E S C R IP T IO N The 74HC/HCT4075 are high-speed Si-gate CMOS devices and are pin compatible w ith the "4 0 7 5 " o f the

7293b

Contextual Info: 74HC/HCT7597 MSI 8-BIT SHIFT REGISTER W ITH INPUT LATCHES FEATURES • • • • T Y P IC A L 8-bit parallel input latches Shift register has direct overriding load and clear Output capability: standard *CC category: MSI SYMBOL PA RAM ETER propagation delay

Contextual Info: 74HC/HCT564 MSI OCTAL D-TYPE FLIP-FLOP; POSITIVE-EDGE TRIGGER; 3-STATE; INVERTING FEATURES • T Y P IC A L • 3-state inverting outputs for bus oriented applications 8-bit positive-edge triggered register Comm on 3-state output enable input Independent register and 3-state

Contextual Info: 7 4 H C /H C T1 0 9 flip-flops DU AL JK FLIP-FLOP W ITH SET AND RESET; POSITIVE-EDGE TRIGGER FEATURES T Y P IC A L U N IT C O N D IT IO N S PARAM ETER SYM BO L HC HCT 15 12 12 17 14 15 ns ns ns tpHL^ tp L H propagation delay n C P to nQ , n Q n S p t o nQ , nQ

Contextual Info: 74HC/HCT107 flip-flops D U A L JK FLIP-F LO P W ITH R E SE T ; N E G A T IV E -E D G E T R IG G E R FEATURES T Y P IC A L • Output capability: standard • I q q category: flip-flops SYM BO L T h e reset {n R is an asy n ch ron ou s active L O W input. W hen L O W , it overrides the

Contextual Info: 74HC/HCT174 MSI HEX D-TYPE FLIP-FLOP W ITH RESET; POSITIVE-EDGE TRIGGER FEATURES T Y P IC A L • S ix e d g e -trig g e re d D -ty p e f lip - f lo p s • A s y n c h ro n o u s m a s te r reset • O u tp u t c a p a b ility : sta n d a rd • I q q c a te g o ry : M S I

Contextual Info: 74HC/HCT162 MSI PRESETTABLE SYNCHRONOUS BCD DECADE COUNTER; SYNCHRONOUS RESET FEA TU R ES T Y P IC A L • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive-edge triggered clock • Synchronous reset • Output capability: standard

EE-19 N

Abstract: hct4053
Contextual Info: 74HC/HCT4053 MSI TRIPLE 2-CHANNEL ANALOG M U LTIPLEXER/DEM U LTIPLEXER FEATURES • • • • • TYPICAL L o w " O N " resistance: 80 n ty p . at v c c - V EE = 4 .5 V 7 0 n (ty p .) at V c c - V EE = 6.0 V 60 i2 (ty p .) at V c c - V EE = 9 .0 V Logic level tra n sla tio n :

Contextual Info: 74HC/HCT4538 MSI D U A L RETRIGGERABLE PRECISION MONOSTABLE MULTIVIBRATOR FEATURES T Y P IC A L • Separate reset inputs • Triggering from leading or trailing edge SYM BO L • Output capability: standard • Iq C category: MSI tP H L / tPLH propagation delay

74HC58

Contextual Info: 74HC58 yv SSI DUAL AND-OR GATE FEATURES TYPICAL The 74HC58 is a high-speed Si-gate CMOS device and is pin compatible w ith low power Schottky T T L LSTTL . It is specified in compliance w ith JEDEC standard no. 7A. The “ 5 8 " provides tw o sections of

TYP33

Abstract: HC 193 n
Contextual Info: 74HC/HCT75 MSI QUAD BISTABLE TRANSPARENT LATCH FEATURES • • • • Complementary Q and Q outputs V c c and GND on the centre pins Output capability: standard ICC category: MSI T Y P IC A L HC tP H L / iP L H propag ation delay n D to nQ , nQ L E n.n to nQ , nQ

Contextual Info: 74HC/HCT194 MSI 4-BIT B ID IR EC TIO N A L UN IVER SAL SHIFT REGISTER FE A T U R E S • • • • • • • T Y P IC A L SYMBOL S hift-left and shift-right capability Synchronous parallel and serial data transfer Easily expanded fo r both serial and parallel operation

HCT4053

Abstract: 4000B
Contextual Info: 7 4 H C /H C T 4 0 5 3 MSI T R IP L E 2 -C H A N N E L A N A L O G M U L T IP L E X E R /D E M U L T IP L E X E R FEATURES • tp Z H / tP Z L tP H Z / CPLZ The 7 4 H C /H C T 4 0 5 3 are high-speed Si-gate CMOS devices and are pin co m p a tib le w ith the " 4 0 5 3 ” o f the

hct 347

Abstract: 74HC 74HCT Modulo-11
Contextual Info: 7 4 H C /H C T 1 6 3 MSI PRESETTABLE SYNCHRONOUS 4-BIT BINA RY COUNTER; SYNCHRONOUS RESET F E A TU R E S • • • • • • T Y P IC A L Synchronous counting and loading Tw o count enable inputs for n-bit cascading Positive-edge triggered clock Synchronous reset

no7a

Abstract: 74HC 74HCT hcmos family tt2-c
Contextual Info: 74HC/HCT20 SSI DUAL 4-INPUT NAND GATE FEATURES • • T Y P IC A L O u tp u t c a p a b ility : s ta n d a rd I q c c a te g o ry : SSI G E N E R A L D E S C R IP T IO N The 7 4 H C /H C T 2 0 are high-speed Si-gate CMOS devices and are pin c o m patible w ith lo w pow er S c h o ttk y