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    74LVC109DB-T Search Results

    74LVC109DB-T Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74LVC109DB-T NXP Semiconductors Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1-2-3.6 Original PDF
    74LVC109DB-T NXP Semiconductors 74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SSOP2-16, FF/Latch Original PDF
    74LVC109DB-T Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Scan PDF