74LS93 P Search Results

74LS90

Abstract: 74ls90 logic TTL 74LS93 SN54/74LS93 74LS90 application 74LS93 74LS93 pin diagram circuit diagram of 74ls92 74LS90 DATASHEET application of 74LS90
Contextual Info: SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS90 , divide-by-six (LS92) or

74LS90

Abstract: 74LS93 pin diagram 74LS93 P circuit diagram of 74ls92 TTL 74ls90 74LS93 logic symbol TTL 74LS93 74LS90 pin diagram 74LS93 74LS92
Contextual Info: SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS90 , divide-by-six (LS92) or

Contextual Info: GD54/74LS93 4-BIT BINARY COUNTER DIVIDE-BY-TWO AND DIVIDE-BY-EIGHT Description Pin Configuration This is an asynchronous 4-bit binary hexadecimal counter function with direct reset inputs. This device is composed of independent binary and octal counters.

hd74lsoop

Abstract: 1S2074 74LSOO HD74LS93
Contextual Info: #4 -b ft Binary Counters The H D 74LS93 contains four master-slave flip-flops and addi­ •PIN ARRANGEMENT tional gating to provide a divide-by-two counter and threestate binary counter for divide-by-eight. To use this maximum count length of this counter, the B input is connected to the

sn 7492 ttl

Abstract: 74293 pin diagram TTL 7493A TTL 74293 7493A 74162 74LS93 74293 74LS183 74LS90
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

CI 74LS90

Abstract: ci 74193 ci 74ls193 CI 74196 ci 7492 CI 74176 74LS93 TTL 74293 TTL 7493A sn 7492 ttl
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

Contextual Info: GD54/74HC93, GD54/74HCT93 4-BIT BINARY RIPPLE COUNTER General Description These devices are identical in pinout to the 54/74LS93. Each circuit contains a 4-bit ripple counter consisting of four master/slave flip-flops that are internally connected to provide separate divideby-two Qo output and divide-by-eight (Q-|, Q2, &

74LS190 pins

Abstract: 74LS192 PIN diagram 74LS183 TTL 74ls163 74LS192 pins Synchronous 74163 74LS161 74160 74LS162 74LS191 pins
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 N C = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

74LS183

Abstract: 74LS193 sn 7492 ttl TTL 74293 TTL 7490 54LS TTL 74LS93 74ls90 74LS93 ttl 7493
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 V cc = Pin 5 G N D = Pin 10 N C = Pin 4 ,1 3 - V cc = Pin 5 G N D = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93

74LS93A

Abstract: 7493a binary counter 74LS93 pinout 7493a counter 74LS93 pin configuration 74LS93PC 7493APC 7493ADC CI 7493 7493A
Contextual Info: 93 CONNECTIO N DIAGRAM PINOUT A ,cl 9/ é 4 /7 4 9 3 A 54LS/74LS93 b / ô ^ < n c p i DIVIDE-BY-SIXTEEN COUNTER T T U cpq MR, [T 131 N C MR! [T Ï2 ÎQ 0 NC (T 1 0 Û3 v c c [T TÖ] G N D NC |T n c DESCRIPTION — The ’93 is a 4-stage ripple counter containing a high speed

TTL 74LS93

Abstract: LC74HC93 74LS93
Contextual Info: 15 E m m m m ~ = L -x * « # * □ v y •? 4077 C M O S 1C LC74HC93— 4-Bit Binary Counter »% , »* JM LC7MC9311 4 t : ^ h c W I' * . * V f t ' ^ r / K i;-tzvh^iâ0 2 i f c ^ V ^¿0 C MOS * * n T / / ^ ', s- J E t 'B f Î 'Î Œ iü ia i2 - 6 V ), LS -T T L ( 74LS93)

ic 7493 truth table

Abstract: logic diagram of ic 7493 circuit diagram of ic 7493 LM 7493 INTERNAL DIAGRAM OF IC 7493 pin diagram of ic 7493 IC 7493 4bit Binary Counter 7493 flip-flop counter IC 7493 configuration ic 7493
Contextual Info: 7493, LS93 Signetics Counters 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The ’93 is a 4-bit, ripple-type Binary Counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

Contextual Info: SN5490A, SN5492A, SN5493A, SN54LS90, SN54LS92, SN54LS93 SN7490A, SN7492A, SN7493A, SN74LS90, SN74LS92, SN74LS93 DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS SDLS940A – MARCH 1974 – REVISED MARCH 1988 Copyright 1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

Contextual Info: SN5490A, SN5492A, SN5493A, SN54LS90, SN54LS92, SN54LS93 SN7490A, SN7492A, SN7493A, SN74LS90, SN74LS92, SN74LS93 DECADE, DIVIDE-BY-TWELVE AND BINARY COUNTERS SDLS940A – MARCH 1974 – REVISED MARCH 1988 Copyright 1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.

TTL 74293

Abstract: 7490A TTL 7493A 74LS93 ttl 74LS173 74LS293 pin 74290 74293 74293 pin diagram 74LS293 Asynchronous counter
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D187 9397, 7497 D188 93167, 74167 0189 54LS/74LS173 9 10 14 15 k h 1 1 — 0 CE Ü 13 12 IE 9 - CP TC 1 0 — 0 Ez 1 2 - Gy 7 CP ;=3ID OE 1 ,1 5 - CPo 4 ,1 2 - C Pi MR Oo Q i Qz 03 2 ,1 4 5,11 3, 13

74LS160

Abstract: Synchronous 74163 74LS190 pins 74192 74LS193 74LS192 pins 74LS191 pins Fairchild 74190 D129 93S16
Contextual Info: FAIRCHILD DIGITAL TTL I Max Clock Rate MHz Typ Clock to Q Output Delay-ns (Typ) Power Dissipation mW (Typ) Logic/Connection Diagram Package(s) 1 Synchronous 93L16 16 Presettable S _r 23 26 85 D127 4L,7B,9B 2 \/ Synchronous 93S16 1/ 16 Presettable S _r 90

TTL 74293

Abstract: 74290 7490A 74LS93 74196 TTL 93S62 7493A 93S43 D114 D116
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D115 93S43 D114 9344 7 1» 18 6 5 4 Vcc = Pin 24 GND = Pin 12 NC = Pin 1, 2, 3, 13 8 1 19 18 17 16 Vcc = Pin 24 GND = 12 D117 93S62 D116 54/74180 8 3 S 23 22 21 20 4 10 11 12 13 1 1 2 2 3 4 10 11 12 13 5 lO h

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

74LS93 P

Abstract: TTL 74LS93 74293 pin diagram 74LS78 TTL 74293 74176 74293 74LS490 74LS93 74LS373
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D82 54LS/74LS78 D81 54LS/74LS541 V cc |S5| RSj FSI F7| F»l FS1 j b j j j F5I Fä| FI j j j SD SD J Q J C CP Q — e Q 5— 9 CP K >— 12 Q K CD CD LlI lil LiJ Lil LiTIU LzJ LlI üü bsJ QNO 9 3 4 li 5 D85

millionspot

Abstract: H500S04-2-C h500s DS40160 2N2222 PIC12C509 source code sleep PIC12C508 tmr0 h500s04 millionspot H500s04 12C508
Contextual Info: Automate the Home Phone Remote Control Unit Author: Mirkov Milos Kikinda, Yugoslavia email: mmki@sezampro.yu APPLICATION OPERATION: This device is for a remote on and off switch for up to three home devices. It consists of two separate parts, a remote control and a main unit.

Contextual Info: TY P ES SN5490A, SN5492A, SN5493A, SN54L90, SN54L93, SN54LS90, SN54LS92, SN54LS93, SN7490A, SN7492A, SN7493A, SN74LS90, SN74LS92, SN74LS93 DECADE, DIVID E-BY-TW ELVE, AND BINARY COUNTERS M A RCH 1974 - SN5490A, SN54LS90 . . . J OR W PACKAGE SN 54L90 . . . J PACKAGE

M53290P

Abstract: M54451P 7 segment common anode 2SC1210 m54820
Contextual Info: ^24^27 oaisam MITSUBISHI T4b • M I T 3 M IT SU BISH I b i p o l a r d i g i t a l ic s M54820P DGTL LOGIC F R EQ U EN C Y CO U N T ER W IT H 5 -D IG IT LED D R IV E R DESC R IPT IO N The M54280P is an l2L semiconductor integrated circuit PIN C O N F IG U R A T IO N (TOP VIEW )

M54451P

Abstract: M54820P M54820 M54451 M5482 m53290 M54812L M53290P 74ls931 5hz frequency GENERATOR
Contextual Info: MITSUBISHI BIPOLAR DIGITAL ICs M54820P FREQUENCY COUNTER W IT H 5 -D IG IT LED D R IVER DESCRIPTION The M54280P is an l 2 L semiconductor integrated circu it PIN CONFIGURATION TOP VIEW consisting o f a frequency counter and a 5-digit LED driver, for use in driving 7-segment LED display elements.