74LS32 function table
Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input OR gates. It performs the Boolean functions V = Â • B or Y = A + B in positive logic. Vcc 14 4B 13 4A 12 4Y 11 38 10 3A 3Y 9 8 [¿-I
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gd54/74ls32qg0421b74ls32 function table |
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ic ttl 7432
Abstract: specifications of IC 7432 supply voltage IC 7432 ls 7432 IC pin configuration ttl 7432 TTL 7432 OR propagation delay 7432 or gate ic 7432 ic 74LS32 SIGNETICS 7432 pin configuration
Contextual Info: 7432, LS32, S32 Gates Signetics Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%: T a = 0°C to +70°C
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74ls3274s32n7432nn74ls32n+14n74s32nn74ls32dn74s32d40/iaic ttl 7432specifications of ic 7432 supply voltageic 7432ls 7432 ic pin configurationttl 7432ttl 7432 or propagation delay7432 or gate ic7432 ic74ls32 signetics7432 pin configuration
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specifications of IC 7432 supply voltage
Abstract: 7432 pin configuration 7432 or gate ic IC 7432 74LS 7432 7432 ic or ic 7432 IC TTL 7432 IC 7432 for or gate Fanout value of IC 7432
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to +70°C
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74ls3274s32n7432nn74ls32n+14n74s32nn74ls32dn74s32dfd7s80sspecifications of ic 7432 supply voltage7432 pin configuration7432 or gate icic 743274ls 74327432 icor ic 7432ic ttl 7432ic 7432 for or gatefanout value of ic 7432
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Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input O R gates. It performs the Boolean functions Y = Â- B or Y = A + B in positive logic. Vcc 14 4B 13 4A 4Y 12 11 A B O U TP U T Y L L
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gd54/74ls32 |
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ttl 7432
Abstract: 7432 ttl 7432 pin configuration 7432 signetics 74LS 7432 TTL 7432 OR propagation delay 74LS32 specification and configuration logic symbol 74LS32 pin configuration and logic symbol 74LS32 pin configuration of 7432
Contextual Info: 7432, LS32, S32 Signetics Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; TA = 0°C to + 70°C
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74ls3274s32n7432nn74ls32n+16n74s32nso-14n74ls32dn74s32d10sul10lsulttl 74327432 ttl7432 pin configuration7432 signetics74ls 7432ttl 7432 or propagation delay74ls32 specification and configurationlogic symbol 74ls32pin configuration and logic symbol 74ls32pin configuration of 7432
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74ls32 equivalent
Abstract: IC 74LS32 SPECIFICATIONS 74LS32 fan-out ttl 7432 7432 pin configuration specifications of IC 74ls32 supply voltage
Contextual Info: Signetics I 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19mA 74LS32 14ns 4.0mA 74S32 4ns 28mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C
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74ls3274s32n7432nn74ls32n+10n74s32nn74ls32dn74s32df07sb0s74ls32 equivalentic 74ls32 specifications74ls32 fan-outttl 74327432 pin configurationspecifications of ic 74ls32 supply voltage
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74LS32 pin configuration
Abstract: pin configuration logic symbol 74LS32 pin configuration 74LS32 74LS32 function table logic symbol 74LS32 74LS32 pin configuration and logic symbol 74LS32 74LS32 configuration 74LS32 NOT gate 74LS32 PIN
Contextual Info: GD54/74LS32 QUADRUPLE 2-INPUT POSITIVE OR GATES Description Pin Configuration This device contains four independent 2-input_OR gates. It performs the Boolean functions Y = A- B or Y = A + B in positive logic. . OUTPUT A B Y L H L L L H H H L H H H 4A 13 12
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gd54/74ls3274ls32 pin configurationpin configuration logic symbol 74ls32pin configuration 74ls32+774ls32 function tablelogic symbol 74ls3274ls32pin configuration and logic symbol 74ls3274ls32 configuration74ls32 not gate74ls32 pin
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I8051
Abstract: IBM R61 display JTAG header 10x2 datasheet Connector LXT384 LXD384 74ls32 datasheet 74LS221 74LS240 74LS32 DIN 4102 B1
Contextual Info: LXD384 — Evaluation Board for Octal T1/E1 Applications Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD384 — Evaluation Board for Octal T1/E1 Applications User Guide. Order Number: 249214-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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lxd384i8051ibm r61 displayjtag header 10x2 datasheet connector+6lxt38474ls32 datasheet74ls22174ls24074ls32din 4102 b1
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ttl 7432
Abstract: 7432 pin configuration TTL 74ls LS32 7432 TTL pin configuration logic symbol 74LS32 74LS32 specification and configuration 7432 7432 signetics TTL 7432 NOT propagation delay ttl 7432 or
Contextual Info: S ig n e lics I 7 4 3 2 , LS 3 2 , S32 Gates Quad Two-Input OR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7432 12ns 19m A 74LS32 14ns 4.0m A 74S 32 4ns 28m A ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C
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74ls3274s32n7432nn74ls32n+16n74s32nso-14n74ls32dn74s32d10sul10lsulttl 74327432 pin configurationttl 74ls ls327432 ttlpin configuration logic symbol 74ls3274ls32 specification and configuration74327432 signeticsttl 7432 not propagation delayttl 7432 or
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74ls521
Abstract: DB25 Parallel connector PAL Decoder 16L8 PC87310EB NEL NE-18A 74LS125 tri-state buffer p20l8 LS521 working of IC 74ls244 as buffer 74LS245
Contextual Info: National Semiconductor Application Note 676 Welson Lin Steve Horeff December 1990 BACKGROUND The PC87310 integrates two UARTs a floppy disk controller with analog data separator one parallel port game port decode hard disk controller decode and standard PC-XT
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pc8731074ls12574ls24520-3a+974ls521db25 parallel connectorpal decoder 16l8pc87310ebnel ne-18a74ls125 tri-state bufferp20l8ls521working of ic 74ls244 as buffer
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74LS32 noise immunity
Abstract: 74LS32 truth table
Contextual Info: TOSHIBA TC74HC32AP/AF/AFN Quad 2-Input or Gate The TC74HC32A is a high speed CMOS2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.
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tc74hc32ap/af/afntc74hc32atc74hc/hct74ls32 noise immunity+174ls32 truth table
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I8051
Abstract: Intel 8081 BN14 HEADER 10X2 T2D 17 67 74LS32 74LS221 74ls32 datasheet i8051 microcontroller diode t2d
Contextual Info: LXD386 — Evaluation Board for Quad T1/E1 Applications Developer Manual January 2001 As of January 15, 2001, this document replaces the Level One document LXD386 — Evaluation Board for Quad T1/E1 Applications User Guide. Order Number: 249215-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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lxd386particularr65i8051intel 8081+8bn14header 10x2t2d 17 6774ls3274ls22174ls32 datasheeti8051 microcontrollerdiode t2d
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74LS32 and gate
Abstract: 16NS25
Contextual Info: TOSHIBA TC74HCT32AP/AF Quad 2-Input or Gate The TC74HCT32A is a high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.
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tc74hct32ap/aftc74hct32atc74hc/hct74ls32 and gate+116ns25
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74ls32 equivalent
Abstract: M74HCT32
Contextual Info: f Z 7 SCS-THOMSON ^7# M54HCT32 M74HCT32 QUAD 2-INPUT OR GATE • HIGHSPEED tpD = 12 ns TYP. AT Vcc = 5 V . LOW POWER DISSIPATION Icc = 1 |iA (MAX.) AT Ta = 25 'C ■ COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN.) V il = 0.8V (MAX) ■ OUTPUT DRIVE CAPABILITY
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m54hct32m74hct3254/74ls32m54/74hct32+2sc0616074ls32 equivalent
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IC AND GATE 7408 specification sheet
Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format
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ic and gate 7408 specification sheet74ls18374ls96sn 74168+67486 xor gateic 74ls192ic 7402, 7404, 7408, 7432, 7400ic 7486 for xor gateic 7418374ls193 function table
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CI 74LS32
Abstract: of IC 74LS32 IC 74LS32 HC176
Contextual Info: TC74HC32AP/AF/AFN QUA D 2- IN P U T OR GATE The TC74HC32A is a high speed CMOS 2 -IN P U T OR G A TE fab ricated w ith silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent L STTL w hile m ain tain in g the CMOS low power
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tc74hc32ap/af/afntc74hc32ahc-176ci 74ls32+3of ic 74ls32ic 74ls32hc176
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Contextual Info: TC74HCT32AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HCT32AP,TC74HCT32AF,TC74HCT32AFN Quad 2-Input OR Gate The TC74HCT32A is a high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent
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tc74hct32ap/af/afntc74hct32aptc74hct32aftc74hct32afn+1tc74hct32a
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74LS32 truth table
Abstract: 74LS32 DIP14-P-300-2 TC74HC32AF TC74HC32AFN TC74HC32AP logic symbol 74LS32 toshiba
Contextual Info: TO SH IBA TC74HC32AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC32AP, TC74HC32AF, TC74HC32AFN Note The JEDEC SOP (FN) is not available in Japan. QUAD 2 -IN PU T OR GATE The TC74HC32A is a high speed CMOS 2 - INPUT OR GATE fabricated with silicon gate C2MOS technology.
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tc74hc32ap/af/afntc74hc32aptc74hc32aftc74hc32afn+5tc74hc32a74ls32 truth table74ls32dip14-p-300-2logic symbol 74ls32 toshiba
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Contextual Info: TC74HC32AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC32AP,TC74HC32AF,TC74HC32AFN Quad 2-Input OR Gate The TC74HC32A is a high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent
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tc74hc32ap/af/afntc74hc32aptc74hc32aftc74hc32afn+1tc74hc32a
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MAX2332
Abstract: M74HCT32 pin DIAGRAM OF IC 74ls32
Contextual Info: M54HCT32 M74HCT32 SGS-mOMSON QUAD 2-INPUT OR GATE • HIGH SPEED tPD = 12 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 1 |iA (MAX.) AT T a = 25 “C ■ COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN.) V il = 0.8V (MAX) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS
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m54hct32m74hct3254/74ls32m54/74hct32+2max2332pin diagram of ic 74ls32
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74LS32
Abstract: DIP14-P-300-2 TC74HCT32AF TC74HCT32AFN TC74HCT32AP
Contextual Info: TO SH IBA TC74HCT32AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HCT32AP, TC74HCT32AF, TC74HCT32AFN Note The JEDEC SOP (FN) is not available in Japan. QUAD 2 -IN PU T OR GATE The TC74HCT32A is a high speed CMOS 2 - INPUT OR GATE fabricated with silicon gate C2MOS technology.
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tc74hct32ap/af/afntc74hct32aptc74hct32aftc74hct32afn+3tc74hct32a74ls32dip14-p-300-2
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schematic 74HC32
Abstract: 74LS32 PIN M74HC32 M54HC32 M54HC32F1R M74HC32B1R M74HC32C1R M74HC32M1R 74LS32 IC 74LS32
Contextual Info: M54HC32 M74HC32 QUAD 2-INPUT OR GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hc32m74hc3254/74ls32m54hc32f1r+8m74hc32m1rm74hc32b1rm74hc32c1rm54/74hc32schematic 74hc3274ls32 pin74ls32ic 74ls32
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M74HCT32
Abstract: M54HCT32 M54HCT32F1R M74HCT32B1R M74HCT32C1R M74HCT32M1R pin DIAGRAM OF IC 74ls32
Contextual Info: M54HCT32 M74HCT32 QUAD 2-INPUT OR GATE . . . . . . . HIGH SPEED tPD = 12 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
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m54hct32m74hct3254/74ls32m54/74hct32+5m54hct32f1rm74hct32b1rm74hct32c1rm74hct32m1rpin diagram of ic 74ls32
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Contextual Info: TOSHIBA TC74HCT32AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HCT32AP, TC74HCT32AF, TC74HCT32AFN N o te The JE D E C SO P (FN ) is not a va ila b le in Ja p a n . QUAD 2 -INPUT OR GATE The TC74HCT32A is a high speed CMOS 2 - INPUT OR
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tc74hct32ap/af/afntc74hct32aptc74hct32aftc74hct32afn+4tc74hct32a14pindip14-p-300-2200mil
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