74LS20 FUNCTION TABLE Search Results

Contextual Info: GD54/74LS20 DUAL 4-INPUT POSITIVE NAND GATES Description This device contains two independent 4-input NAND gates. It performs the Boolean functions y = A B-C D or Y = A + B + C + D in positive logic. Function Table each gate INPUTS OUTPUT N* V L L H H L

7421 pin configuration

Abstract: 7420 pin configuration 74LS20 PIN CONFIGURATION 7421 logic gate 7421 AND 74LS20 function table 74LS21 PIN CONFIGURATION TTL 7420 7421 AND gate PIN CONFIGURATION 7420
Contextual Info: Signehcs I 7420, 7421, LS20, LS21, S20 Gates Logic Products Dual Four-Input NAND '20 AND ('21) Gate Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7420 10ns 8mA 74LS20 10ns 0.8mA 8mA 74S20 3ns 7421 12ns 8mA 74LS21

Contextual Info: SCS-THOMSON lÄ g«LiM (s «S M54HC20 M74HC20 DUAL 4-INPUT NAND GATE • HIGH SPEED tpo = 8 ns (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 nA (MAX.) AT Ta = 25 *C ■ HIGHNOISE IMMUNITY V nih = V n il = 28 % V c c (MIN.) ■ OUTPUT DRIVE CAPABILITY

IC CMOS 74LS20

Contextual Info: J TC74HC20AP/AF/AFN DUAL 4 - I N P U T NAND GATE The TC74HC20A is a high speed CMOS 4-IN P U T NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power

74Ls20 truth table

Abstract: 74ls201
Contextual Info: TOSHIBA TC74HC2QAP/AF/AFN Quad 4-Input NAND Gate The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated w ith silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

HC164

Contextual Info: TC74HC20AP/AF/AFN D U A L 4-INPUT NAND GATE_ The TC74HC20A is a high speed CMOS 4-IN PU T NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power

74Ls20 truth table

Abstract: 74LS20 DIP14-P-300-2 TC74HC20AF TC74HC20AFN TC74HC20AP 74ls20 14 PIN
Contextual Info: TO SHIBA TC74HC20AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC20AP, TC74HC20AF, TC74HC20AFN DUAL 4 -IN PUT NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

Contextual Info: TO SH IBA TC74HC20AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC20AP, TC74HC20AF, TC74HC20AFN Note The JEDEC SOP (FN) is not available in Japan DUAL 4 -INPUT NAND GATE The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

74ls20 14 PIN

Contextual Info: T O SH IB A TC74HC20AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC20AP, TC74HC20AF, TC74HC20AFN Note The JEDEC SOP (FN) is not available in Japan DUAL 4 -IN PUT NAND GATE The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

74LS20 ic

Abstract: M54HC20 M54HC20F1R M74HC20 M74HC20B1R M74HC20C1R M74HC20M1R 74Ls20 truth table
Contextual Info: M54HC20 M74HC20 DUAL 4-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 8 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74LS20 ic

Abstract: M74HC20 M74HC20B1R M74HC20C1R M74HC20M1R M54HC20 M54HC20F1R
Contextual Info: M54HC20 M74HC20 DUAL 4-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 8 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74Ls20 truth table

Contextual Info: TOSHIBA TC74HC20AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC20AP, TC74HC20AF, TC74HC20AFN DUAL 4 -INPUT NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

74LS20 ic

Abstract: ic 74ls20 74LS20 DIP14-P-300-2 TC74HC20AF TC74HC20AFN TC74HC20AP
Contextual Info: TC74HC20AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC20AP,TC74HC20AF,TC74HC20AFN Dual 4-Input NAND Gate The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

74LS20

Abstract: DIP14-P-300-2 TC74HC20AF TC74HC20AFN TC74HC20AP
Contextual Info: TC74HC20AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC20AP,TC74HC20AF,TC74HC20AFN Dual 4-Input NAND Gate The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Contextual Info: TC74HC20AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC20AFN Dual 4-Input NAND Gate The TC74HC20A is a high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

74LS20N

Abstract: 3th 5j 74ls20 pin diagram 74LS20 function table dm74ls2 74LS20M/63
Contextual Info: S E M IC O N D U C T O R tm DM74LS20 Dual 4-Input NAND Gates General Description This device contains tw o independent gates each of which perform s the logic N AND function. Features • Alternate M ilitary/Aerospace device 54LS20 is available. C ontact a Fairchild Sem iconductor Sales

74191, 74192, 74193 circuit diagram

Abstract: IC 7402, 7404, 7408, 7432, 7400 Truth Table 74161 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions counter 74168 74191, 74192, 74193 truth table of ic 7495 A schematic diagram for the IC of 7411
Contextual Info: P L S -W S /H P MAX+PLUS II Programmable Logic Software for HP/Apollo Workstations Data Sheet September 1991, ver. 3 Features □ □ LI LI □ □ □ □ General Description Software support for Classic, M A X 5000, M A X 7000, and ST G E P L D s Runs on H ew lett Packard /A p o llo Series 3000, 3500, 4000, 4500, and

sn 74373

Abstract: SN 74114 logic diagram of ic 74112 IC 7486 xor IC 7402, 7404, 7408, 7432, 7400 7486 xor IC sn 74377 IC TTL 7486 xor IC TTL 7495 diagram and truth table IC 74374
Contextual Info: PLS-WS/SN MAX+PLUS II Programmable Logic Software for Sun Workstations Data Sheet September 1991, ver. 1 Features J J □ □ □ J □ IJ Softw are supp ort for Classic, M A X 5000, M A X 7000, and S T G EPLD s Runs on Sun S P A R C s ta tio n s with S u n O S version 4.1.1 or h igher

74LS205

Contextual Info: / 'K -v 1 DESCRIPTION The MN5500 is a 12 Bit A/D Converter designed specifically for microprocessor applications. Internal circuitry is sup­ plied for chip select, address decoding, and the other inter­ face signals required by popular microprocessors. In most

HYC4000

Abstract: hyc5000
Contextual Info: TMC2005-JT ARCNET 5 Port HUB Controller FEATURES ̇ ̇ ̇ ̇ ARCNET HUB Circuit for ARCNET Protocol Data Rate From 156.25Kbps to 10Mbps Able to Connect Various Transceivers Directly Device Includes TX/RX Timing Circuit for 5 Port Hub and Direction Control Circuit, Jitter Correct

HYC2485S

Abstract: hyc5000 HYC2485 hyc9088s HYC4000 hyc5000 smsc ARCNET driver HYC2488S HYC9088 ic hm 2007
Contextual Info: TMC2005-JT ARCNET 5 Port HUB Controller FEATURES ƒ ƒ ƒ ƒ ARCNET HUB Circuit for ARCNET Protocol Data Rate From 156.25Kbps to 10Mbps Able to Connect Various Transceivers Directly Device Includes TX/RX Timing Circuit for 5 Port Hub and Direction Control Circuit, Jitter Correct

74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 4 BIT COUNTER 74669 la 4508 ic schematic diagram XF107 74295 random number generator by using ic 4011 and 4017
Contextual Info: General Features The SCxD4 series of high performance CMOS gate arrays offers the user the ability to realise customised VLSI inte­ grated circuits featuring the speed performance previously obtainable only with bipolar technologies whilst retaining all the advantages of CMOS technology; low power consum p­

toshiba tc110g

Abstract: 74LS82 74ls150 74LS514 toshiba tc140g 74ls150 pin configuration 74LS273 SC11C1 diode sr45 74LS194 internal circuit diagram
Contextual Info: SIEMENS AKTIEN6ESELLSCHAF 47E » • BS3SbOS 0037405 7 » S I E G General Description Our Sea-of-Gates concept is based on a highperformance CMOS technology, in either 1.5 micron or 1.0 micron transistor gate length. This is equivalent to 1.1 or 0.8 micron effective