74LS00 FUNCTION TABLE Search Results

74LS00 pin configuration

Abstract: gd74ls04 74LS00 function table 74LS00 pin configuration 74LS00 74LS00 Electrical and Switching characteristics 74LS04 NOT gate GD74LSOO 74LS00 clock frequency pin configuration 74LS04
Contextual Info: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates, jt^ performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 3Y 1B tY 2A 2B 2Y GND Function Table each gate

IC 74LS00

Abstract: 74LS00 74LS00 pin configuration 74LS00 function table pin configuration 74LS00 NAND 74LS00 74LS00 clock frequency 74LS00 Electrical and Switching characteristics 74LS00 application 74ls00 NAND gate
Contextual Info: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. It performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 3Y 14 13 12 11 10 9 8 Function Table each gate

74LS00 clock frequency

Abstract: 74LS00 function table pin configuration 74LS00
Contextual Info: GD54/74LS00 QUADRUPLE 2-INPUT POSITIVE NAND GATES Description This device contains four independent 2-input NAND gates. K performs the Boolean functions Y = A B or Y = A + B in positive logic. Pin Configuration V cc 4B 4A 4Y 3B 3A 14 13 12 11 10 9 3Y 8 lIoJ lioJ

74LS00 function table

Abstract: pin configuration logic symbol 74LS00 ls 7400 specification of 74ls00 74LS00 pin configuration logic symbol 74LS00 pin configuration 74LS00 7400 ls TTL 74ls00 TTL LS 7400
Contextual Info: Signelics | 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE 7400 74LS00 74S00 TYPICAL SUPPLY CURRENT TOTAL 9ns 8mA 9.5ns 1.6mA 3ns 15mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; TA = 0°C to + 70°C

74LS00 fan-out

Abstract: 74LS00 TTL 74LS00 noise immunity 7400 fan-in 74LS00 gate 74LS00 Electrical and Switching characteristics 74ls00 applications TTL 7400 rise and fall time ttl 74ls00 series logic symbol 74LS00
Contextual Info: DESIGN CONSIDERATIONS S U P P L Y VO LTA G E AN D T E M P E R A T U R E RANGE The nominal supply voltage Vcc for ail TTLcircuits is +5.0V. Commercial grade parts are guaranteed to perform with a ±5% supply tolerance (±250 mV) over an ambient temperature range of 0°C to 75CC.

7400 signetics

Abstract: 74LS00 7400 74S00 74LS00 function table 7400 pin configuration N7400N TTL 7400 propagation delay 74LS00 DATA TTL 7400 7400 signetics TTL 74LS00
Contextual Info: Signetics I 7400, LS00, S00 Gates Quad Two-Input NAND Gate Product Specification Logic Products TYPE TY PIC A L PR O PAG ATIO N D ELAY 7400 74LS00 74S00 TY P IC A L S U P P LY C U R R E N T TO TAL 9ns 8m A 9.5 n s 1.6m A 3n s 15m A ORDERING CODE C O M M ER C IA L R A N G E

IC TTL 74LS00

Abstract: TTL LS 7400 IC TTL 74 ls 04 7400 fan-out cmos 7400 fan-out TTL 7400 catalog TTL 74ls00 TTL 7400 rise and fall time of ic 74ls00 74LS00 gate
Contextual Info: Design Considerations, Testing and Applications Assistance Form FAST AND LS TTL FAST AND LS TTL DATA 3-1 3 DESIGN CONSIDERATIONS SELECTING TTL LOGIC. TTL Families may be mixed in a system for optimum performance. For instance, in new designs, ALS would commonly be used in non-critical speed paths to minimize power consumption while FAST TTL would be used in high

M74HC00

Contextual Info: SGS-THOMSON t^OO«LIOT ô iO(Si M54HC00 M74HC00 QUAD 2-INPUT NAND GATE . HIGH SPEED tpD = 6 ns (TYP.) AT Vcc = 5 V • LOW POWER DISSIPATION Icc = 1 nA (MAX.) AT Ta = 25 °C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % V cc (MIN.) ■ OUTPUTS DRIVE CAPABILITY

74HC00M

Abstract: IC 74HC00 74hc00 equivalent 74LS00 PIN 54HC00 74HC00 74HC00 SERIES DATA 14 pin 74HC00 74HC00 quad CMOS nand gate M74HC00M1R
Contextual Info: r z 7 SCS-TH O M SO N * 7 # « « [L tiO IM K S M 54HC00 M 74HC00 QUAD 2-INPUT NAND GATE HIGHSPEED 6 ns TYP. AT Vcc = 5 V LOW POWER DISSIPATION Ice = 1 \iA (MAX.) AT Ta = 25 "C HIGH NOISE IMMUNITY V nih = V n il = 28 % Vcc (MIN.) OUTPUTS DRIVE CAPABILITY

logic symbol 74LS00

Abstract: 74LS00 truth table 74LS00 impedance
Contextual Info: TOSHIBA TC74HC0QAP/AF/AFN Quad 2-Input NAND Gate The TC74HC00A is a high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

Contextual Info: TC74HC00AP/AF/AFN QUAD 2-IN PU T NAND GATE The TC74HC00A is a high speed CMOS 2-IN P U T N A N D G A T E fabricated w ith silicon gate C 2 MOS technology. It achieves the high speed operation sim ila r to equivalent L STTL w hile m ain tain in g the CMOS low power

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

pin diagram of ic 74165

Abstract: CI 74122 Multiplexer IC 74151 motorola 6820 pia MCM6810P PIA 6821 ic 74393 CA3084 HDSP-2451 HDSP-2470
Contextual Info: Using the HDSP-2000 Alphanumeric Display Family Application Note 1016 Introduction First introduced in 1975, the HDSP2000 alphanumeric display has been designed into a variety of applications. The HDSP-2000 display was originally designed for commercial, industrial, instrumentation, and business equipment applications.

Contextual Info: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003 D Package Options Include Plastic Small-Outline D, NS, PS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and

74LS00 truth table

Abstract: 74LS00 CMOS 74LS00 gate 74LS00 integrated circuit 74LS00 impedance 74LS00 DIP14-P-300-2 TC74HCT00AF TC74HCT00AFN TC74HCT00AP
Contextual Info: TOSHIBA TC74HCT00AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HCT00AP, TC74HCT00AF, TC74HCT00AFN QUAD 2 -INPUT NAND GATE Note The JEDEC SOP (FN) is not available in Japan. The TC74HCT00A is a high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

Contextual Info: SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003 D Package Options Include Plastic Small-Outline D, NS, PS , Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and

74ls163 function table

Contextual Info: GD54/74LS163A SYNCHRONOUS 4-BIT COUNTER: BINARY, SYNCHRONOUS CLEAR Feature • • • • • • Pin Configuration Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable Load Control Line Diode-Clamped Inputs

M74HC00B1

Abstract: M74HC00M1R 74hc00 gate M74HC00 M74HC00B1R 74LS00 74HC00 M54HC00 M54HC00F1R M74HC00C1R
Contextual Info: M54HC00 M74HC00 QUAD 2-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUTS DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS

Contextual Info: TC74HCT00AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HCT00AP,TC74HCT00AF,TC74HCT00AFN Quad 2-Input NAND Gate The TC74HCT00A is a high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

74LS00 truth table

Abstract: TC74HC00AFN TC74HC00AP 74LS00P 74LS00 integrated circuit 74LS00 DIP14-P-300-2 TC74HC00AF 74LS00 PIN
Contextual Info: TO SHIBA TC74HC00AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC00AP, TC74HC00AF, TC74HC00AFN QUAD 2 -INPUT NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HC00A is a high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

74ls371

Abstract: 6821 PIA CI 74LS00 7490 counter HDSP2470 74LS208 hdsp-2471 74165 motorola HDSP-2300 PIA EF 6821
Contextual Info: Using the HDSP-2000 Alphanumeric Display Family Application Note 1016 Introduction First introduced in 1975, the HDSP-2000 alphanumeric display has been designed into a variety of applications. The HDSP-2000 display was originally designed for commercial, industrial, instrumentation, and business

74LS00

Abstract: DIP14-P-300-2 TC74HCT00AF TC74HCT00AFN TC74HCT00AP 74LS00 integrated circuit 74LS00 CMOS 74LS00 truth table 74ls00 tr tf TTL
Contextual Info: TO SHIBA TC74HCT00AP/AF/AFN TO SH IBA CM OS D IG ITAL INTEGRATED CIRCUIT SILICON M O NO LITHIC TC74HCT00AP, TC74HCT00AF, TC74HCT00AFN QUAD 2 -INPUT NAND GATE The TC74HCT00A is a high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

Contextual Info: TOSHIBA _ TC74HCT00AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HCT00AP, TC74HCT00AF, TC74HCT00AFN QUAD 2 -IN P U T NAND GATE Note The JEDEC SOP (FN) is not available in Japan The TC74HCT00A is a high speed CMOS 2-INPUT NAND

Contextual Info: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­