74LS 04 N Search Results

Contextual Info: LS T T L D N 74LS Series DN74LS04 D N 74L S 04 Dio74-LS 04 Hex Inverters P-1 • Description D N 7 4 L S 0 4 c o n ta in s six in v e rte r c irc u its. ■ Features • • L ow p o w e r c o n su m p tio n P d = 12m W ty p ic a l H igh sp ee d ( t pd = 9 .5 n s ty p ic a l)

74163 four bit binary counter

Abstract: LS162A 74163 pin configuration counter diagram 74161 162 bcd 74160 function table pin diagram of 74163 pin diagram of 74160 74LS163A equivalent LS160A
Contextual Info: 74160, 74161, 74163, LS160A, LS161A, LS162A, LS163A S ig n e tic s Counters '160, '162 BCD Decade Counter '161, '163 4-Bit Binary Counter Logic Products Product Specification FEATURES • Synchronous counting and loading • Two Count Enable Inputs for nbit cascading

74LS373PC

Abstract: 74LS373P e10s LOGIC DESCRIPTION OF 74LS373 LS 373 74LS373DC 54LS373DM 54LS373FM 74LS373FC 74LS373D
Contextual Info: 373 CONNECTIO N DIAGRAM PINOUT A / 54LS/74LS373 OCTAL TRANSPARENT LATCH W ith 3-S tate Outputs OE [7 Ü3 Vcc Oo U ï ï) 1 0 7 Do [ 2 jÜ D ? Di [7 13 De 01 [T ïi)0 6 02 (T 1 5 ] 05 Ds [ 7 ï ï d 3 [T 13] d » o 3 |T T U 04 G ND ¡10 DESCRIPTION — The ’373 consists o f eight latches w ith 3-state outputs for

74170PC

Abstract: oc75 54170DM 54170FM 54LS170DM 74170DC 74170FC 74LS170DC 74LS170FC 74LS170PC
Contextual Info: / — 7 Q - u / ~ u / _ CO NNECTIO N DIAGRAM PINOUT A 54/74170 54LS /74LS 170 4 X 4 REGISTER FILE Dz [T 16] V cc □3 [2 T |]D i W ith O p e n -C o lle c to r O utputs D 4 [I u ] W Ao [7 Ï5 ] W Ai RAi 12] WE RAo |T DESCRIPTION — T he ’170 contains 16 high speed, low power, transparent

M74LS682P

Abstract: 682P 683P
Contextual Info: MITSUBISHI LSTTLs M74LS682P v * o i # > fJ 8 -B IT M A G N ITU D E COMPARATOR DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74L S 68 2P is a semiconductor integrated circuit con­ taining tw o 8 -bit words comparator functions. O U TP U T • ~ W O p>0 -

ic 74198

Abstract: sn 74198 74198
Contextual Info: LOGIC SYMBOL 54/74198 3 DESCRIPTION FEATURES The “ 198” is a 8 -Bit B idirectio nal Universal Shift R egiste r useful in a w ide varie ty of a p ­ plications. As a high speed m ultifunctional sequential building block, it may be used in seria l-seria l, s eria l-pa rallel, pa rallel-se rial,

74LS04 fan-out

Abstract: 7404PC 74LS04 pinout ls 7404 74LS04PC pin diagram of 7404 74ls04 hex inverter 74LS04P 74LS04* hEX INVERTER 74LS04 Hex Inverter definition
Contextual Info: 04 C O N N E C T IO N D IA G R A M S P IN O U T A •n *''54/7404 O 'n i> & ¡'54H/74H04 ; ■■ ^ 4 S /7 4 S 0 4 / " O /5 4 S /7 4 S 0 4 A ^ 4 L S /7 4 L S 0 4 G 3 E Œ Œ [I Œ d , - /- HEX INVERTER PKGS OUT C O M M E R C IA L G RADE M ILITA R Y G RADE

ST 1076

Abstract: SN74LS214 LCC4270 SN74LS215
Contextual Info: 54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS PIN A SSIG N M EN TS TO P VIEW S R A N D O M -A C C E SS M E M O R IE S Vç c A D H 207 W OE 1/01 V w of 1/01 1/02 1/03 E D G E -T R IG G E R E D W R IT E C O N T R O L 2 5 6 4 -B IT W O RDS C O M M O N I/O PORTS

74LS04 fan-out

Abstract: 7404PC 74LS04PC 74LS04 pinout 74s04p 74Ls04 fanout 74ls04 hex inverter 74LS04* hEX INVERTER 74LS04P 7404FC
Contextual Info: 04 CO NNECTIO N DIAGRAMS PINOUT A ^ 4 /7 4 0 4 ¡54H/74H04 ^ 4S /7 4 S 0 4 /54S/74S04A ^4LS/74LS04 / r Œ Œ [I Œ - 6 3 HEX INVERTER g n d ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C

S-R flip flop clock

Abstract: sr flip flop PIN DIAGRAM
Contextual Info: 323 / ^ 54LS/74LS323 Olb CO NNECTIO N DIAGRAM PINOUT A -1 4 ° 8-BIT UNIVERSAL SHIFT/STO RAG E REGISTER With S ynchronous Reset and C om m on I/O Pins DESCRIPTION — The ’323 ¡s an 8-bit universal shift/storage register w ith 3state outputs. Its fu n ctio n is sim ilar to the ’299 with the exception of Syn­

74LS293 Asynchronous counter

Abstract: 54ls293 74LS293 74LS293 pin 74LS N74LS293D N74LS293N
Contextual Info: Signetics 74LS293 Counter 4-Bit Binary Ripple C ounter Product Specification Lo g ic P rod ucts DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists o f four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

16 bit comparator 74ls

Abstract: 8bit counter 74ls successive approximation 54LS502DM 54LS502FM 74LS502FC 74LS502PC 74LS502
Contextual Info: 502 CO NNECTIO N DIAGRAM PINOUT A {(Q^ 54LS /74LS 502 8-B IT SUCCESSIVE APPR O XIM ATIO N REGISTER DESCRIPTION — The ’LS502 is an 8-bit register w ith the interstage logic necessary to perform serial-to-parallel conversion and provide an active LOW Conversion Com plete (CC signal coincident with storage of the eighth

Contextual Info: 54LS/74LS299 LOGIC SYMBOL DESCRIPTION FEATURES The "299" Is an 8-Bit Bidirectional Universal S h ift/S to ra g e R e g iste r w ith a 3 -sta te bidirectional Input/Output port. The register has four operating modes: shift right, shift left, parallel load, and hold do nothing . The

74165PC

Abstract: 74165 truth table 74LS165PC 74165DC 74LS165 74ls165d 7416 74165 54165DM 54165FM
Contextual Info: 165 C O NNECTIO N DIAGRAM P IN O U T A .« i/7 4 1 6 5 S 5 4 L S /7 4 L S 1 6 5 ' 0 ' / s / ^ * 3 7 8-B IT PAR ALLEL-TO -SER IAL CONVERTER 1 DESCRIPTION — Th e ’ 165 is a n 8 -b it pa ra lle l load or se ria l-in re g is te r w ith c o m p le m e n ta ry o u tp u ts a va ila b le fro m th e last stage. Parallel in p u tin g o c c u rs

Contextual Info: 322 I Ì 4»4LS/74LS322 I CO NNECTIO N DIAGRAM PINOUT A o ^ 8-BIT SERIAL/PARALLEL REGISTER (With Sign Extend DESCRIPTION — The ’322 is an 8-bit shift register w ith provision for either serial or parallel loading and with 3-state parallel outputs plus a bi-state serial

54LS378DM

Abstract: 54LS378FM 74LS378DC 74LS378FC 74LS378PC 6bit register
Contextual Info: 378 C O N N E C T IO N D IA G R A M P IN O U T A / / • b ^ V 54LS/74LS378 P A R A L LE L D REGISTER \ With Enable 1 TjOvcc iE QoE Ï Do [3 Ü lD s s ]Q 5 D i[4 là ] 04 Q i[| T 2I Q d2 [| îï] “3 0 2 |T ÏÔ ]0 3 GNO [ T J }C P D E S C R IP T IO N — T h e ’378 is a 6 -b it reg iste r w ith a b u ffe re d co m m o n enable.

Contextual Info: 74LS670 Signetics Register File 4 x 4 Register File 3-State Product Specification Logic Products FEATURES • Simultaneous and independent Read and Write operations • Expandable to almost any word size and bit length T Y PE T Y P IC A L PR O P A G A TIO N

74LS290

Abstract: 1N3064 1N916 74LS N74LS290D N74LS290N diodes 5480
Contextual Info: 74LS290 Signetics Counter Decade C o un te r Product Specification L o g ic P roducts DESCRIPTION The '290 is a 4-bit, ripple type decade counter. The device consists of four master-slave flip-flops internally c on­ nected to provide a divide-by-two sec­

OF IC 74170

Abstract: 54170FM
Contextual Info: 170 CO NNECTIO N DIAGRAM PINOUT A 1/54/74170 54LS /74LS 170 11 0 / , ~i ^ T— r 4 X 4 REGISTER FILE With O pen-Collector Outputs DE S C R IP TIO N — The ’170 contains 16 high speed, low power, transparent D-type latches arranged as four words of fou r bits each, to fun ctio n as a

Contextual Info: 74LS256 Signetics Latch Dual 4-Bit Addressable Latch Product Specification Logic Products FEATURES TYPE • Com bines dual dem ultiplexer and 8-bit latch TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 19ns 22m A 7 4LS 256 • Serial-to-parallel capability

74LS42PC

Contextual Info: 42*43*44 , / / / £, ' / ' c ^ / 1'/ CO NNECTIO N DIAGRAM PINOUT A l/54/7442A • V54LS/74LS42 c / 6 / r t & / c o ^ S4/7443A • ^4/7444A r / / , 1 - o f - 1 0 D E C O D E R DESC RIPTIO N-T h e ’42, ’43 and ’44 are m ultipurpose decoders. For any

74LS374PC

Abstract: 74LS374 74LS374P 74LS374DC 74LS374FC 74LS374D 54LS374DM 54LS374FM
Contextual Info: 374 C O N N E C T IO N D IA G R A M P IN O U T A 54LS /74LS 374 51 [7 20] Vcc O C TA L D-TYPE FLIP-FLOP Oo [T Î 9J07 W ith 3-State O utputs Do [ 3 ¡D D T D E S C R IP T IO N — T he ’374 is a h igh speed, lo w p o w e r o cta l D -typ e flip -flo p

54170DM

Abstract: 54170FM 54LS170DM 74170DC 74170FC 74170PC 74LS170DC 74LS170FC 74LS170PC
Contextual Info: 170 C O N N E C T IO N D IA G R A M P IN O U T A / 1Ì54/74170 ^ <J5 4 L S / 7 4 L S 1 70 0 / , - 7 4 X 4 REGI STER FILE W ith O p e n -C o lle cto r O utputs d2|j d3|7 «Jo, d 4 [3 Ï 4 ] WAo R A i [4 751w a i rao — D E S C R IP T IO N T h e '170 c o n ta in s 16 h igh speed, low p o w e r, tra n sp a re n t

74ls219

Abstract: 74LS189A 54LS219A ls189 74LS219A lta 601 ic 319A SN74LS189A
Contextual Info: SN54LS189A, SN54LS219A, SN54LS289A, SN54LS319A SN74LS189A, SN74LS219A, SN74LS289A, SN74LS319A 64-BIT RANDQM-ACCESS MEMORIES D 2 4 1 7 . SEPTEMBER 1 9 8 0 - REVISED FEBRUARY 1 9 8 5 Organized as 16 Words of Four Bits Each S N 5 4 L S 1 8 9 A . S N 5 4 L S 2 8 9 A . . . J PACKA GE