74L SERIES Search Results

DN74LS27

Abstract: MA161
Contextual Info: LS TTL DN74LS Series DN74LS27 D N 74L S 2 7 bf0 7 d.LSQ.-j T rip le 3 -input P ositive NOR G ates • Description P-1 D N 74L S27 contains three 3-input positive isolation NOR gate circuits. I Features • • • • Low power consum ption P d = 13.5m W typical

MD5408

Abstract: 74SC244 M074 19uk MD54BCB41
Contextual Info: ISO-CMOS, 3 -S ta te Octal Buffers/Line Drivers MITEL Technical D ata MDB4SC840, MD54SC841, MD54SC540, MD548C541 MD74SC840, MD74BC841, MD74SC540, MD74SC541 MD548CB44 «JAN *8 8 MD74SC844 Features Ordering Information • E quivalent to 54/74L S ’ series

md74sc138

Abstract: M0541 74SC138 MD74SC137 748CE
Contextual Info: IV 1IT E L — Technical D ata MD54SC137, MD54SCS37, MD74SC137, MD748C837, ISO-CMOS Octal D ecoders/D em ultiplexers MD548C138, MDB48C139 M0548CS38, MD74SC138, O A N 'S e MD548CS38 MD748C139 MD748C838, MD748CE39 F eatures Ordering Information • E quivalent to 54/74L S ’ series

DN74LS194A

Abstract: MA161
Contextual Info: DN74LS194A LS TTL DN74LS Series DN74LS194A 14 ^ iq4* 4 -bit Bidirectional Universal Shift Registers • Description P-2 D N 74L S 194A is a bidirectional 4-bit serial/parallel input to serial/parallel output shift register. Features Synchronous serial/parallel input to serial/parallel output

DN74LS390

Abstract: LS290 LS90
Contextual Info: DN74LS390 LS TTL DN74LS Series DN74LS390 IV 74L-S39D Dual D ecade C ounters • Description P-2 D N74LS390 contains two asynchronous decade counter circuits w ith direct-coupled reset inputs. ■ Features • • • • • ■ Includes tw o circuits corresponding to LS90 and LS290 for

DN74LS136

Contextual Info: I DN74LS1 36 LS TTL DN74LS Series DN74LS136 Quad 2-input Exclusive OR Gates with Open Collector Outputs P-1 • Description D N 74L S136 contains four 2-input exclusive OR gate circuits w ith open collector outputs. ■ • • • • Features “Wired” A ND capability

5v constant power supply lob

Abstract: D107 DN74LS32
Contextual Info: LS TTL DN74LS Series DN74LS32 D N 74L S 32 î 3^ Quad 2 - input Positive OR Gates • D escription DN74LS32 contains four 2-input positive isolation OR gate circuits. P-1 H Features • • • • Low power consumption Pd = 20mW typical) High speed (tpd = 14ns typical)

Contextual Info: g Quality S emiconductor ,In c . High Speed CM O S 3.3V 16-Bit Latched Transceiver with Bus Hold and Output Resistor q s 74l c x i 62H543 FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Industry standard pinouts • 25Q Series resistor for low switching noise

DN74LS114

Abstract: MA161
Contextual Info: LS TTL DN74LS Series DN74LS114 DN74LS114 Dual J-K Negative Edge-Triggered F lip -F lop s with Set, Common Reset and Common Clock • Description D N 74L S114 contains two negative-edge triggered J-K flip­ flop circuits w ith com m on clock-CP and direct-coupled reset

Contextual Info: LS TTL DN74LS Series DN74LS11 DN74LS11 D^74LS11 Triple 3-input P ositive AND Gates • Description P-1 D N 74L S 11 contains three 3-input positive isolation AND gate circuits. I Features • Low pow er consum ption P d = 13mW typical • High speed ( t pii = 9ns typical)

Contextual Info: Gì SGS-THOMSON ULiCTKOTOei 74L C X 244 LOW VOLTAGE CMOS OCTAL BUS BUFFER 5V TOLERANT INPUTS AND OUTPUTS 3-STATE . 5V TOLERANT INPUTS AND OUTPUTS i HIGHSPEED: tpD =4.5 ns (TYP.) at Vcc =3.3V . POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE:

Contextual Info: LS TTL DN74LS Series DN74LS164 DN74LS164 8 -b it Parallel-out Serial Shift Registers • Description P-1 D N 74L S164 is an 8-bit serial in p u t to serial/parallel o u tp u t shift register w ith direct-coupled reset input. ■ Features • • • • •

Contextual Info: TOSHIBA T C 74L V X 86F / F N / F S Quad Exclusive OR Gate The TC74LVX86 is a high speed CMOS EXCLUSIVE OR GATE fabricated with silicon gate C2MOS technology. Designed for use in 3.3 Volt systems, it achieves high speed operation while maintaining the CMOS low power dis­

74LCX16245

Abstract: C4746 74LCX16245T LCX16245 TSSOP48
Contextual Info: 7/ 74L C X 16245 LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER 3-STATE W ITH 5V TO LE R AN T INPUTS AN D O U TPU TS . 5VTOLERANT INPUTS AND OUTPUTS - HIGHSPEED: tpD = 4.5 ns (MAX.) at Vcc =3.0V - POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE:

74LS28

Abstract: DN74LS28
Contextual Info: DN74LS28 LS T TL DN74LS Series DN74LS28 Quad 2 -input P ositive NOR Buffers P-1 • Description DN 74L S28 contains four 2-input positive isolation N O R buffer gate circuits. ■ Features • • • • High fan-out I o l = 24m A , I o h = —1.2m A Low pow er consum ption (Pti = 22mW typical)

Contextual Info: Quality S em ic o n d u c to r , In c . High Speed CMOS 3.3V 16-Bit Register 3-State With Output Resistor and Bus Hold qs 74l c x i 62H374 FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during

pin DIAGRAM OF IC 74HC74

Contextual Info: TOSHIBA T C 74L V Q 74 F / F N / F S QUAD D - Type Flip Flop With Preset and Clear The TC74LVQ74 is a high speed CMOS D-FLIP FLOP fabri­ cated with silicon gate and double-layer metal wiring C2MOS technology. Designed for use in 3,3 Volt systems, it achieves high

DN74LS373

Contextual Info: LS TTL DN74LS Series DN 74LS373 DN74LS373 K>74 LS. 373 Octal D-type Transparent Latches with 3 -sta te Outputs • Description D N 74L S 373 con tain s eight 3-state o u tp u t D -type latch circuits w ith com m on o u tp u t-c o n tro l enable in puts for all circuits.

Contextual Info: TOSHIBA T C 74L V Q 0 4 F / F N / F S HEX Inverter The TC74LVQ04 is a high speed CMOS HEX INVERTER fab­ ricated with silicon gate and double-layer metal wiring C2MOS technology. Designed for use in 3.3 Volt systems, it achieves high speed operation while maintaining the CMOS low power dis­

frits

Contextual Info: TOSHIBA T C 74L C X 8 6 F / F N / F S PRELIMINARY Low-Vottage Quad 2-Input EXCLUSIVE OR Gate with 5V Tolerant Inputs and Outputs The TC74LCX86 is a high performance CMOS 2-INPUT EXCLUSIVE OR GATE. Designed for use in 3.3 Volt systems, it achieves high speed operation while maintaning the CMOS

Contextual Info: CD4014BM CD4014BC 8-Stage Static Shift Register General Description Dual-In-Line Package Features Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD typ Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS 5V – 10V – 15V parametric ratings

74LS320

Abstract: SN74LS321 CLS321 SN74LS326 LS320 SN54LS320 SN54LS321 SN74LS320 D2418
Contextual Info: SN54LS320, SN54LS321, SN74LS320, SN74LS321 CRYSTAL CONTROLLED OSCILLATORS S D L S 158 D 2 4 1 8 , DECEMBER 1 9 7 8 - 'LS320 • • S N 5 4 L S 3 2 0 . . . J OR W PACKAGE S N 74L S 3 20 . . . N PACKAGE Crystal-Controlled Oscillator Operation from 1 M Hz to 20 M Hz

74HC00

Abstract: 74HC00F 74HC00 toshiba
Contextual Info: TOSHIBA T C 74L V X 00F / F N / F S Quad 2 - Input Nand Gate The TC74LVX00 is a high speed CM O S 2-INPUT NAND GATE fabricated with silicon gate C 2MOS technology. Designed for use in 3.3 Volt systems, it achieves high speed operation while maintaining the CMOS low power dis­

Contextual Info: October 1987 Revised January 1999 S E M ¡ C O N D U C T O R TM Features • Wide supply voltage range: ■ High noise immunity: 3.0V to 15V 0.45 Vqq typ. ■ Low power TTL compatibility: or 1 driving 74LS ■ New formula: C in Farads) PW 0 ut = RC Fan out of 2 driving 74L