| 74HC74D |
|
NXP Semiconductors
|
Dual D-type flip-flop with set and reset; positive edge-trigger |
Original |
PDF
|
178.85KB |
21 |
| 74HC74D |
|
On Semiconductor
|
74HC74 - IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, SOIC-14, FF/Latch |
Original |
PDF
|
132.65KB |
8 |
| 74HC74D |
|
Philips Semiconductors
|
Dual D-type flip-flop with set and reset positive-edge trigger |
Original |
PDF
|
101.35KB |
13 |
| 74HC74D |
|
Toshiba Semiconductor and Storage
|
Integrated Circuits (ICs) - Logic - Flip Flops - IC FF D-TYPE DUAL 1BIT 14SOIC |
Original |
PDF
|
191.14KB |
|
| 74HC74D |
|
Unknown
|
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
Historical |
PDF
|
40.04KB |
1 |
| 74HC74D |
|
Philips Semiconductors
|
Dual D-Type Flip-Flop with Set and Reset |
Scan |
PDF
|
172.77KB |
5 |
| 74HC74D |
|
Philips Semiconductors
|
Over 600 obsolete distributor catalogs now available on the Datasheet Archive - Logic, Dual D Type Edge Triggered Flip-Flop, Pkg Style 14 Lead SOIC |
Scan |
PDF
|
26.9KB |
1 |
| 74HC74D118 |
|
NXP Semiconductors
|
IC FF D-TYPE DUAL 1BIT 14SO |
Original |
PDF
|
867.09KB |
|
| 74HC74D,652 |
|
NXP Semiconductors
|
Dual D-type flip-flop with set and reset; positive-edge trigger - Description: Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 82 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 14@5V ns; Voltage: 2.0-6.0 V; Package: SOT108-1 (SO14); Container: Bulk Pack, CECC |
Original |
PDF
|
116.61KB |
22 |
| 74HC74D,652 |
|
NXP Semiconductors
|
74HC74 - IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14, FF/Latch |
Original |
PDF
|
178.85KB |
21 |
| 74HC74D,653 |
|
NXP Semiconductors
|
Dual D-type flip-flop with set and reset; positive-edge trigger - Description: Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 82 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 14@5V ns; Voltage: 2.0-6.0 V; Package: SOT108-1 (SO14); Container: Reel Pack, SMD, 13", CECC |
Original |
PDF
|
116.61KB |
22 |
| 74HC74D,653 |
|
NXP Semiconductors
|
74HC74 - IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 3.90 MM, PLASTIC, SOT-108-1, SO-14, FF/Latch |
Original |
PDF
|
178.85KB |
21 |
| 74HC74D/AU118 |
|
NXP Semiconductors
|
IC FF D-TYPE DUAL 1BIT 14SO |
Original |
PDF
|
867.09KB |
|
| 74HC74D/AUJ |
|
NXP Semiconductors
|
Logic - Flip Flops, Integrated Circuits (ICs), IC FLIP FLOP DUAL D TYPE 14SOIC |
Original |
PDF
|
|
21 |
|
|
| 74HC74DB |
|
NXP Semiconductors
|
Dual D-type flip-flop with set and reset; positive edge-trigger |
Original |
PDF
|
178.85KB |
21 |
| 74HC74DB |
|
Philips Semiconductors
|
Dual D-type flip-flop with set and reset, positive-edge trigger |
Original |
PDF
|
84.66KB |
13 |
| 74HC74DB |
|
Unknown
|
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
Historical |
PDF
|
40.04KB |
1 |
| 74HC74DB,112 |
|
NXP Semiconductors
|
Dual D-type flip-flop with set and reset; positive-edge trigger - Description: Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 82 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 14@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Tube |
Original |
PDF
|
116.61KB |
22 |
| 74HC74DB,112 |
|
NXP Semiconductors
|
74HC74 - IC HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 5.30 MM, PLASTIC, MO-150, SOT-337-1, SSOP-14, FF/Latch |
Original |
PDF
|
178.85KB |
21 |
| 74HC74DB,118 |
|
NXP Semiconductors
|
Dual D-type flip-flop with set and reset; positive-edge trigger - Description: Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 82 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 14@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Reel Pack, SMD, 13" |
Original |
PDF
|
116.61KB |
22 |
