74AUP1T Search Results

74AUP1G126

Abstract: 74AUP1G32 JESD22-A114E 74AUP1T1326
Contextual Info: 74AUP1T1326 Low-power dual supply buffer/line driver; 3-state Rev. 01 — 20 January 2009 Product data sheet 1. General description The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply buffer/line driver with output enable circuitry.

74AUP1T34GF

Abstract: 74AUP1T34GM MO-203
Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 2 — 19 August 2010 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

JESD22-C101E

Contextual Info: Demonstrate seven different logic functions NXP demo board for the configurable logic device 74AUP1T97 NXP demo board for the configurable logic device 74AUP1T97 Key features and benefits } Wide supply voltage range: 2.3 to 3.6 V } High noise immunity } Excellent ESD protection

74AUP1T45

Abstract: 74AUP1T45GF 74AUP1T45GM 74AUP1T45GW JESD22-A114E marking A5 sot363
Contextual Info: 74AUP1T45 Low-power dual supply translating transceiver; 3-state Rev. 02 — 3 August 2009 Product data sheet 1. General description The 74AUP1T45 is a single bit transceiver featuring two data input-outputs A and B , a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B) which enable

Contextual Info: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 3 — 30 November 2011 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 4 — 16 March 2012 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

74AUP1T58GF

Abstract: 74AUP1T58GM 74AUP1T58GW JESD22-A114E
Contextual Info: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 01 — 6 March 2008 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

Contextual Info: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 4 — 15 August 2012 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

Contextual Info: 74AUP1T97 TinyLogic Low Power Configurable Gate with Voltage-Level Translator Features Description ̇ Single Supply Voltage Translator - 1.8V to 3.3V Input at VCC=3.3V - 1.8V to 2.5V Input at VCC=2.5V ̇ ̇ 2.3V to 3.6V VCC Supply Voltage Operation The 74AUP1T97 is a universal configurable 2-input

74AUP1T1326

Contextual Info: 74AUP1T1326 Low-power dual supply buffer/line driver; 3-state Rev. 01 — 20 January 2009 Product data sheet 1. General description The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply buffer/line driver with output enable circuitry.

Contextual Info: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 3 — 30 November 2011 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

Contextual Info: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 4 — 15 august 2012 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

74AUP1T97

Abstract: 74AUP1T97GF 74AUP1T97GM 74AUP1T97GW JESD22-A114E
Contextual Info: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 01 — 25 October 2007 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

74AUP1T45GF

Abstract: 74AUP1T45GM 74AUP1T45GW 74AUP1T45
Contextual Info: 74AUP1T45 Low-power dual supply translating transceiver; 3-state Rev. 01 — 18 October 2006 Product data sheet 1. General description The 74AUP1T45 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 01. — 17 January 2006 Preliminary data sheet 1. General description The 74AUP1T34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

74AUP1T57

Abstract: 74AUP1T57GF 74AUP1T57GM 74AUP1T57GW
Contextual Info: 74AUP1T57 Low-power configurable gate with voltage-level translator Rev. 3 — 21 July 2010 Product data sheet 1. General description The 74AUP1T57 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

74AUP1T97

Abstract: 74AUP1T97GF 74AUP1T97GM 74AUP1T97GW
Contextual Info: 74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 2 — 18 October 2010 Product data sheet 1. General description The 74AUP1T97 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

12V 230V Inverter Diagram

Abstract: 300v dc 230v ac inverter 12v to 230v inverter design 74AUP1T97 12V 230V Inverter circuit JESD22-A114 12v dc to 230v ac inverter circuit 8.5 230v 230v to 12v dc circuit diagrams
Contextual Info: 74AUP1T97 TinyLogic Low Power Configurable Gate with Voltage-Level Translator Features Description ƒ Single Supply Voltage Translator - 1.8V to 3.3V Input at VCC=3.3V - 1.8V to 2.5V Input at VCC=2.5V ƒ ƒ 2.3V to 3.6V VCC Supply Voltage Operation The 74AUP1T97 is a universal configurable 2-input

74AUP1T45

Abstract: 74AUP1T45GF 74AUP1T45GM 74AUP1T45GW
Contextual Info: 74AUP1T45 Low-power dual supply translating transceiver; 3-state Rev. 3 — 4 November 2010 Product data sheet 1. General description The 74AUP1T45 is a single bit transceiver featuring two data input-outputs A and B , a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B) which enable

74AUP1T58GF

Abstract: 74AUP1T58GM 74AUP1T58GW
Contextual Info: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 3 — 18 October 2010 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

74AUP1T98GF

Abstract: 74AUP1T98GM 74AUP1T98GW
Contextual Info: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 2 — 19 October 2010 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

Contextual Info: 74AUP1T98-Q100 Low-power configurable gate with voltage-level translator Rev. 1 — 19 May 2014 Product data sheet 1. General description The 74AUP1T98-Q100 provides low-power, low-voltage configurable logic gate functions. Eight patterns of 3-bit input determine the output state. The user can choose the logic

001aad993

Abstract: 74AUP1T98GF 74AUP1T98GM 74AUP1T98GW JESD22-A114E
Contextual Info: 74AUP1T98 Low-power configurable gate with voltage-level translator Rev. 01 — 6 March 2008 Product data sheet 1. General description The 74AUP1T98 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic

Contextual Info: 74AUP1T58 Low-power configurable gate with voltage-level translator Rev. 5 — 15 August 2012 Product data sheet 1. General description The 74AUP1T58 provides low-power, low-voltage configurable logic gate functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic