74ACT11240 Search Results

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Contextual Info: 54ACT11240, 74ACT11240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS TI0072— D3410, M AY 1987— R E V IS E D M A R C H 1990 54ACT11240 . . . JT P A C K A G E 74ACT11240 . DW O R NT P A C K A G E • Inputs are TTL-Voltage Compatible Flow-Through Architecture to Optimize PC B

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A − MAY 1987 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes DB, DW, OR NT PACKAGE TOP VIEW PCB Layout 1Y1 1Y2 1Y3 1Y4 GND GND GND GND 2Y1

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

74ACT11240

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

74ACT11240DBLE

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A − MAY 1987 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes DB, DW, OR NT PACKAGE TOP VIEW PCB Layout 1Y1 1Y2 1Y3 1Y4 GND GND GND GND 2Y1

74ACT11240

Abstract: 54ACT11240
Contextual Info: 54ACT11240, 74ACT11240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS TI0072— D3410, M AY 1987— R EVISED MARCH 1990 54AC T11240 . . . J T PAC KAG E 74AC T11240 . . . D W OR NT PAC KAG E • Inputs are TTL-Voltage Compatible • Flow-Through Architecture to Optimize PCB

74ACT11240

Abstract: 74ACT11240DBLE 74ACT11240DBR 74ACT11240DBRE4 74ACT11240DBRG4 74ACT11240DW 74ACT11240DWE4 74ACT11240DWG4 74ACT11240DWR
Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

D3410

Contextual Info: 54ACT11240, 74ACT11240 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS210 - 03410, MAY 1987 - REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible 54A C T11240. . . J T PACKAGE 74A C T11240. . . DB, DW OR NT PACKAGE Flow-Through Architecture Optimizes

74ACT11240

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

74ACT11240

Abstract: 74ACT11240DBLE 74ACT11240DBR 74ACT11240DBRE4 74ACT11240DW 74ACT11240DWE4 74ACT11240DWR 74ACT11240DWRE4 74ACT11240NT
Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

Texas Instruments act11240

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A − MAY 1987 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes DB, DW, OR NT PACKAGE TOP VIEW PCB Layout 1Y1 1Y2 1Y3 1Y4 GND GND GND GND 2Y1

1990- 2335

Abstract: 74ACT11240
Contextual Info: TEXAS XNSTR LOGIC 31E D 6^1723 DOfiSTm fl M T I I 3 54ACT11240, 74ACT1124Q OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS - 5 T '¿ - 0 7 - 0 TI0072—D3410, MAY 1987—REVISED MARCH 1990 54ACT11240 . . . JT PACKAGE 74ACT11240 . . . DW OR NT PACKAGE

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A − MAY 1987 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes DB, DW, OR NT PACKAGE TOP VIEW PCB Layout 1Y1 1Y2 1Y3 1Y4 GND GND GND GND 2Y1

Contextual Info: 74ACT11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS210A – MAY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations

74AC11240N

Abstract: act11240
Contextual Info: 74AC/ACT 11240 Signetics O ctal Buffer/Line Driver; 3-State; INV Product Specification ACL Products GENERAL INFORMATION SYMBOL • Output capability: ±24 mA Propagation delay A to Y PLH • CMOS AC and TTL (ACT) voltage level inputs Power dissipation capacitance per

hct 4047 bt

Abstract: SN74ALS679 FCT Fast CMOS TTL Logic 74LS 4075 7804 inverter SN74368A DTL Logic 4069 CMOS hex inverter SN502 CD74AC374
Contextual Info: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold

74HCT 4013

Abstract: CD4078 4093 BF SN74368A SN74ALS679 LXZ Series 4069 CMOS hex inverter 2a2 vacuum tube CD74AC374 cd408
Contextual Info: SN54HC240, SN74HC240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS128B – DECEMBER 1982 – REVISED MAY 1997 D D SN54HC240 . . . J OR W PACKAGE SN74HC240 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

SN74 schmitt trigger

Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
Contextual Info: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic