7402 DIP Search Results

7402 pin configuration

Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
Contextual Info: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C

7402 TTL

Abstract: 7402 TTL 7402 7402 pin configuration 74LS02 function table 74LS02 pin configuration 7402 signetics TTL specification of 74ls02 7402 nor 74S02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

TTL LS 7402

Abstract: 74LS02 pin configuration TTL 7402 7402 pin configuration 7402 TTL 7402 NOR gate 7402 74LS 7402
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5 V ± 5 % ; T A = 0°C to +70°C

7402 NOR gate ic pin configuration

Abstract: IC 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74LS02 pin configuration 74LS02 function table 7402 ic ttl 7402 7402 logic gate ic IC 74LS02
Contextual Info: Signetics I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE VCC = 5V±5%; Ta = 0°C to +70°C

74S02N

Abstract: 7402 NOR gate ic pin configuration IC 7402 74LS02N LS 7402 IC PIN CONFIGURATION OF 74LS02 7402 pin configuration 74ls02 signetics 7402 quad 2 input not 74LS02 pin configuration
Contextual Info: Signetìcs I 7402, LS02, S02 Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7402 10ns 11m A 74LS 02 10ns 2.2m A 74S 02 3.5ns 22m A ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to +70°C

54l02

Abstract: IC 74LS02
Contextual Info: TYPES SN5402, SN54L02, SN54LS02, SN54S02, SN7402, SN74LS02, SN74S02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES REVISED DECEMBER 1983 SN 5402, SN54L02 . . . J PACKAGE SN 54LS02, S N 54S 02 . . . J OR W PACKAGE SN 7402 . . . J OR N PACKAGE SN 74LS02, S N 74S 02 . . . D, J OR N PACKAGE

7402 quad 2- input nor gate

Abstract: 7402 quad 2 input not 7402 TTL 7402 logic diagram 7402 NOR gate 7402 ttl gate 9N02 9N02 7402 TTL 7402 9N02/7402
Contextual Info: FAIRCHILD TT L/SSI • 9N02/5402, 7402 QUAD 2-INPUT NOR GATE SCHEMATIC DIAGRAM EACH GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) FLATPAK (TOP VIEW) T5TS1 ra r?l Positive logic: Y = A+B C o m p o n e n t values show n are ty p ic a l. RECOMMENDED OPERATING CONDITIONS

IC 7402

Abstract: IC TTL 7402 74LS02 gate diagram logic diagram of ic 7402 54LS02 TTL SN7402
Contextual Info: SN 5402, SN 54 LS0 2, SN 54S02, SN 7402, SN 74LS02, SN 74S02 QUADRUPLE 2-INPUT POSITIVE NOR GATES DECEMBER 1 9 8 3 -R E V IS E D MARC H 1 9 6 8 • Package Options Include Plastic "Sm all O utline” Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

Contextual Info: CONNECTION DIAGRAMS PINOUT A 54/7402 0//<Tr/ Ç ‘'&4S/74S02 e » //û s" ^S4LS/74LS02 Q UAD 2-INPUT NOR GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE Vcc = +5.0 V ±5%, = 0°C to +70° C Ta MILITARY GRADE Vcc = +6.0 V ± 10%, = -55° C to +125° C

IC 74LS02

Abstract: 74LS02 pinout 74LS02 7402pc 74LS02P 74S02PC
Contextual Info: NATIONAL SEflICOND { L O G I C } DEE D I bSGliea 00^3^3^ 1 I CO NN ECTIO N DIAGRAMS PINOUT A 54/7402 54S/74S02 54LS/74LS02 QUAD 2-INPUT NOR GATE ORDERING CODE: See S ection 9 PIN PKGS CO M M ERCIAL GRADE V cc = +5.0 V ±5%, = 0 °C to +70° C O UT Ta M ILITARY GRADE

C574Q

Abstract: ED-37
Contextual Info: Military Standard FIFO s 64x4 64x5 C ascad ab le & Standalone Memory C57401 57401 C57401A 5 74 01 A C57402 5 7402 C 5 74 02 A 57402A Features/Benefits Description • • • • • The C/57401/1A and C57402/2A are “fall through” high-spead First-In First-Out FIFO memories organized 64 words by 4 bits

7402PC

Abstract: 74LS02 pinout LS 7402 74LS02PC pinout 7402 74LS02 7402P 7402 DIP 74S02PC 5402DM
Contextual Info: 02 C O N NECTIO N DIAGRAMS PINOUT A "54/7402 C / / r r/ 9 ^ 4 S /7 4 S 0 2 ¿7 / / / ÛS ^S 4LS /74LS 02 w e 3 QUAD 2-INPUT NOR GATE ORDERING CODE: See S ection 9 PKGS PIN COM M ERCIAL GRADE M ILITARY GRADE OUT V cc = +5.0 V ±5%, Ta = 0 °C to +70° C V cc = +5.0 V ± 10%,

7408 DIP

Abstract: 7404 inverter 7400 DIP 7404 dip 7408 7402 nand 7404 hex inverter 7404 7408 and T7430
Contextual Info: BIPOLAR DIGITAL ICs continued TYPE T T L - T 7 4 , T 54 series" z o 1Q. C TJ a. 5 B O- OC O I=3 O z < ÜJ ID < u < Q- C/3 LU O Gates T 7400/5400 Quad 2-input N A N D 10 40 10 D IP H,P T 7401/5401 Quad 2-input open-collector N A N D 10 40 10 D IP H,P T 7402/5402

7404 dip

Abstract: 7493 4 bit binary counter 4 nand dip 16 74122 Retriggerable Monostable Multivibrator Noise immunity of 7408 7476 counter CI 7405 Noise immunity of 7486 decade counter 7492 7492 binary counter
Contextual Info: BIPOLAR DIGITAL ICs continued TYPE T T L - T 7 4 , T 54 series" z o 1Q. C TJ a. 5 B O- OC O I=3 O z < ÜJ ID < u < Q- C/3 LU O Gates T 7400/5400 Quad 2-input N A N D 10 40 10 D IP H,P T 7401/5401 Quad 2-input open-collector N A N D 10 40 10 D IP H,P T 7402/5402

IC 7402, 7404, 7408, 7432, 7400

Abstract: TTL IC 7405 7400 logic gate ic IC AND GATE 7408 ic 7400 logic symbol 7408 AND GATE fan in 9N01 IC 7400 nand gate 7408, 7404, 7486, 7432 IC 7404 hex inverter
Contextual Info: SSI • GATES, BUFFERS AND INVERTERS LOW POWER tpcj = 20 ns Pd = 2 mW per Gate STANDARD tpd = 10 ns Pd = 10 mW per Gate 0°C to +70° C and -5 5 ° to +125°C 0° to +70° C -5 5 ° t o +125° C 9 L00 9N00/7400 9N00/5400 9N01/7401 9N01/5401 9N03/7403 9N03/5403

7404 TTL CMOS

Abstract: cmos 7404 7400 family monitor products 970 7400A1A1 ttl family 7404 DDDD252 7400 series pin connection TTL 7402 # 7400 TTL
Contextual Info: MONI TOR PRODUCTS CO INC 20E D 000054^ 3 MONITOR PRODUCTS M O N I T OR T-50-Z3 LOW CO ST INDUSTRIAL TIGHT TO LERAN CE C LO C K OSCILLATORS TEM PERATURE COMPENSATED OSCILLATORS T-SO -Oc! PACKAGE D IM E N S IO N S Dimension* in inches and mm PACKAGE 1 fa T

42900

Abstract: DD-42900
Contextual Info: DD-42900 ARINC 429 Microprocessor Interface Device This Preliminary data sheet provides detailed functional capabilities for product currently in prototype production. These specifications are being provided to allow for electrical design, layout and operation.

DG303A

Abstract: DG301A SN7402
Contextual Info: — DG 303A u g v+ S3Œ D3Œ m S4 m D4 D, [± m °2 ïs i S2 B IN 2 I] V- NC [ T U IN , U q nd - C M O S Analog Switches a -> y ? S, 291 ]T s, s3 o o - IN i o — IN 2 O s 2 O— S4 o - • «8t # S X'i •yf- m m SPDT 2 m • -O -T ? - -Cr^T^-

DG301A

Abstract: SN7402 L144 EK28 TTL SN7402 DG303 L-144
Contextual Info: - DG 30 I A 289 - C M O S A na lo g S w itch • « S m m . □ ìs "J *7 • 4^ e > jg iS 0 ÍB & NC [ T r - H M] V+ Ü d NC [ 3 m Nc S, E 0] s2 NC [ 5 ü] NC IN [ 6 I ] NC a] V- d ,Œ q n d [T s, oo d 2 ■ I N ^ L T 'X ^ f 7 f 2 ^ 0 N . H T 'X 'f y f l ^ O N .

on off 555 timer using relay drive

Abstract: 555 timer truth table missing pulse detector using 555 555 off delay 555 off delay timer circuits constant current circuit using 555 timer 555 missing pulse detector circuit 555 missing pulse detector 74LS02 datasheet 555 timer remote control
Contextual Info: MID400 POWER LINE MONITOR INTRODUCTION The MID400 is an optically isolated AC line-to-logic interface device for monitoring ON or OFF status of an AC power line. The logic circuitry operates from a standard 5V supply. The MID400 is packaged in a compact 8-pin plastic DIP package. The optical isolation provided by the MID400 makes it suitable for power-to-logic

AD6711

Abstract: op amp 725 7404 pinout table AD684A 2k411
Contextual Info: Monolithic 12-Bit 2 MHz A/D Converter AD671 a FEATURES 12-Bit Resolution 24-Pin “Skinny DIP” Package Conversion Time: 500 ns max—AD671J/K/S-500 Conversion Time: 750 ns max—AD671J/K/S-750 Low Power: 475 mW Unipolar 0 V to +5 V, 0 V to +10 V and Bipolar Input

C1426A

Abstract: AD671 AD671K-500 7404* 15v d-latch AD684A 4-bit flash adc
Contextual Info: Monolithic 12-Bit 2 MHz A/D Converter AD671 a FEATURES 12-Bit Resolution 24-Pin “Skinny DIP” Package Conversion Time: 500 ns max—AD671J/K/S-500 Conversion Time: 750 ns max—AD671J/K/S-750 Low Power: 475 mW Unipolar 0 V to +5 V, 0 V to +10 V and Bipolar Input

SN74LS02 function

Abstract: SN74LS02 SN74LS02 function table ci sn7402 SN54S02 LS02 SN5402 SN54LS02 SN7402 SN74S02
Contextual Info: TYPES SN5402, SN54L02, SN54LS02, SN54S02, SN7402, SN74LS02, SN74S02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES R F V IR F D D E C E M B E R 1 9 8 3 • S N 5 4 0 2 . S N 5 4 L 0 2 -1 P AC KA G E SN 5 4 L S 0 2 . SIM 5 4 S 0 2 I OR W P AC K A G E S N 7 4 0 2 . . . J OR N P AC KA G E

SN74LS02 function

Contextual Info: SN5402, SN54LS02, SN54S02, SN7402, SN74LS02, SN74S02 QUADRUPLE 2 INPUT POSITIVE-NOR GATES DECEMBER 1 9 8 3 -REVISED MARCH 1988 Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs SN 5402 . . . J