74 C23 Search Results

Contextual Info: TH S73 THS7374 74 www.ti.com SLOS590B – JULY 2008 – REVISED JANUARY 2011 4-Channel SDTV Video Amplifier with 6th-Order Filters and 6-dB Gain Check for Samples: THS7374 FEATURES DESCRIPTION • Fabricated using the revolutionary complementary Silicon-Germanium SiGe BiCom3X process, the

c36p

Abstract: L18P r18p
Contextual Info: * OPA640X - WIDEBAND VOLTAGE FEEDBACK OPERATIONAL AMPLIFIER MACROMODEL * * CREATED 11/21/93 DS * REV. A * * -* | NOTICE: THE INFORMATION PROVIDED HEREIN IS BELIEVED TO BE RELIABLE; | * | HOWEVER; BURR-BROWN ASSUMES NO RESPONSIBILITY FOR INACCURACIES OR

Contextual Info: MIC4744 4 MHz Dual 2A Integrated Switch Buck Regulator General Description Features The Micrel MIC4744 is a high efficiency dual PWM buck step-down regulator that provides dual 2A current output. The MIC4744 operates at 4MHz. A proprietary internal compensation technique allows a closed loop bandwidth of

UPD 552 C

Abstract: LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210
Contextual Info: XC5200 Field Programmable Gate Arrays  June 1, 1996 Version 4.0 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed

CAPT3216

Abstract: PAD35 PTC1111 I82559ER l28c PTC111 HEAD2X10 ptc1111-00 8 pin LM393 ic for 12v swdip
Contextual Info: A B C D E F G H 1 1 80312/Coyanosa DECOUPLING SPCI DECOUPLING IC DECOUPLING +3V +3V SDRAM DECOUPLING +3V +3V +3V +3V +5V +3V +5V 2 C139 1 2 C61 1 2 C161 1 2 2 3 4 5 CAPT7343 47uF C23 2 1 CAP0805 0.1uF C154 2 1 CAP0805 0.1uF C117 2 1 CAP0805 0.1uF C22 2 1 CAP0805

f71882fg

Abstract: fintek f71882fg f71882 AUTOMATIC 12V PC FAN CONTROL BY USING THERMISTOR scr speed control dc motor PC intel ICH8 MOTHERBOARD FAN MOTOR CONTROL SPEED WITH LM358 micro USB Connector AB type Female dual stacked FINTEK F71882FG IO FAN MOTOR CONTROL SPEED WITH LM358 PWM
Contextual Info: F71882 F71882 Super Hardware Monitor + LPC I/O Release Date: May, 2008 Version: V0.28P May, 2008 V0.28P F71882 F71882 Datasheet Revision History Version 0.20P 0.21P Date 2005/10/14 2005/12/08 Page 8 13 50 53 103 105 106 107 0.21P 0.22P 2005/12/14 2005/12/19

A12B11

Abstract: d-t pt 5000VA 5256VA 5384VA 5512VA 5512VA-110LB388 208pin PQFP
Contextual Info: ispLSI 5512VA In-System Programmable 3.3V SuperWIDE High Density PLD — Superior Quality of Results — Tightly Integrated with Leading CAE Vendor Tools — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms

Micro Linear Application Note 33

Abstract: ML4827-1 ML 723 CT IEC1000-3-2 ML4824-1 ML4827 ML4827-2 400V to 6V DC Regulator TO 220 Package Micro Linear Application Note 33 pfc
Contextual Info: November 1998 PRELIMINARY ML4827 Fault-Protected PFC and PWM Controller Combo GENERAL DESCRIPTION FEATURES The ML4827 is a controller for power factor corrected, switched mode power supplies, that includes circuitry necessary for conformance to the safety requirements of

5384VA

Abstract: AF14 EL B17
Contextual Info: ispLSI 5384V In-System Programmable 3.3V SuperWIDE High Density PLD — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms Features • SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC

AA13

Abstract: AA19 AC11 AC13 AD12 bga 208 PACKAGE
Contextual Info: ispLSI 3320 High-Density Programmable Logic J0 F3 G2 G1 G0 F2 F1 F0 E3 D Q D Q H1 E2 OR Array D Q E1 AND Array H2 H3 D Q D Q OR Array Twin GLB E0 D Q D3 D Q D2 I1 D Q I2 D1 I3 D0 C3 Global Routing Pool GRP J1 C2 J2 C1 J3 C0 Output Routing Pool (ORP) I0

T25 4 h5

Abstract: AE23 AF23 EP20K60E 356-pin 215 bga BGA128
Contextual Info: EP20K60E I/O Pins ver. 1.1 I/O & VREF Bank 8 8 8 8 – 8 8 8 8 8 – 8 – Pad Number Orientation Pin/Pad Function 144-Pin TQFP 1 208-Pin PQFP (1) 240-Pin PQFP (1) 144-Pin 324-Pin 356-Pin FineLine BGA FineLine BGA BGA 1 2 3 4 5 6 7 8 9 10 11 12 13 – –

3256E

Contextual Info: ispLSI 3256E In-System Programmable High Density PLD Functional Block Diagram G3 H0 A0 A1 OR Array A2 A3 ORP ORP • IN-SYSTEM PROGRAMMABLE — 5V In-System Programmable ISP using Lattice ISP or Boundary Scan Test (IEEE 1149.1) Protocol — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality

A3P1000

Abstract: 160 e7 Datasheet A3P125 FBGA A3P250 A3P030 FBGA A3P600
Contextual Info: ProASIC3 Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle center of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at

RPS_PRES

Abstract: MST01 power 22E IR10DEN FB17 TPO7 TPI 163 lxd schematic LXD983 arbin
Contextual Info: LXD983/983B Reference Design Schematics Reference Design Schematics Reference Design Schematic, Sheet 1:LXD 983 Top Level Schematic
 D-1 LXD983/983B Reference Design Users Guide Reference Design Schematic, Sheet 2:Raptor1 1 2 3 4 5 6 IR10CLK IR10DAT IR10ENA

A3P060

Abstract: A3P125 A3P400 A3P030 FBGA A3P600 A3P1000
Contextual Info: ProASIC3 Packaging 3 – Package Pin Assignments 48-Pin QFN Pin 1 48 1 Notes: 1. This is the bottom view of the package. 2. The die attach paddle center of the package is tied to ground GND . Note For Package Manufacturing and Environmental information, visit the Resource Center at

R3000

Abstract: RC3041 RC4640 RC4650 RC5000 2CY17 CX171
Contextual Info:
            Version 1.1 October 1999 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1999 Integrated Device Technology, Inc. Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in

sky73020

Abstract: pcb 830 m rifa S1125 DB714 S643 S646 S685 S903 SKY73020-11 c36880
Contextual Info: DATA SHEET SKY73020-11: 700 – 1000 MHz High Gain and Linearity Diversity Downconversion Mixer for 2G/3G Base Station Transceiver Applications Applications Description • 2G/3G base station transceivers: − GSM/EDGE, CDMA, UMTS/WCDMA, iDEN The SKY73020-11 is a fully integrated diversity mixer that

W9967CF

Abstract: W9968CF MA10 MD10 MD11 jpeg encoder w9967
Contextual Info: W9968CF JPEG USB DUAL MODE CAMERA CHIP W9968CF JPEG USB Dual Mode Camera Chip -1- Publication Release Date: May 1999 Revision A2 W9968CF Revision History Revision Issue Date Comments A1 April, 1998 Formal release. A2 May, 1999 Supports USB Spec. Rev. 1.1. Changed bcdUSB and bcdDevice

d12n marking

Abstract: d13n3 lt 8202 mark d13n two Tone generator LTC2256C LTC2256I LTC2257C LTC2257I LTC2258-14
Contextual Info: Electrical Specifications Subject to Change LTC2258-14 LTC2257-14/LTC2256-14 14-Bit, 65/40/25Msps Ultralow Power 1.8V ADCs FEATURES DESCRIPTION n The LTC 2258-14/LTC2257-14/LTC2256-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect

12 pin 7 segment display layout

Abstract: CS28 PT6607 PT6607-H PT6608 128 64 graphic LCD R27R1 "LCD DRIVER"
Contextual Info: Princeton Technology Corp. Preliminary LCD Driver IC Tel: 886-2-29162151 Fax: 886-2-29174598 URL: http://www.princeton.com.tw PT6607 DESCRIPTION PT6607 is a 64-channel common driver for dot matrix liquid crystal graphic display system. It utilizes CMOS Technology and provides 64 shift registers and 64 output drivers. PT6607 generates the timing signal which

Contextual Info: DATA SHEET Part No. MN63Y1210A Package Code No. SSOP016-P-0225E Publication date: June 2013 Ver. AEM 1 Contents Chapter 1 Overview . 9 1.1

GRM155R71C104KA88B

Abstract: GRM1555C1H5R6D GRM1555C1H5R GRM1555C1H2 GRM1555C1H180JZ01B 1p5 sot 23 ATR2406 ATR2406-DEV-BOARD BC808 CFR47
Contextual Info: Features • • • • • • • • • • • • Fully Integrated Low IF Receiver Fully Integrated GFSK Modulator for 72, 144, 288, 576 and 1152 Kbits/s High Sensitivity of Typically –93 dBm Due to Integrated LNA High Output Power of Typically +4 dBm

DALE R 01F

Abstract: oms 450 R9810 CON-DB25HF DRB2 OMS 1410 CRCW1206000ZT ITT Cannon ITT Cannon SMB Connectors AD8055
Contextual Info: a FEATURES 140 MSPS Guaranteed Conversion Rate 100 MSPS Low Cost Version Available 330 MHz Analog Bandwidth 1 V p-p Analog Input Range Internal +2.5 V Reference Differential or Single-Ended Clock Input 3.3 V/5.0 V Three-State CMOS Outputs Single or Demultiplexed Output Ports

CON-DB25HF

Abstract: CRCW1206000ZT oms 450 AD8055 AD9483 AD9483KS-100 AD9483KS-140 R101 R102 so20w
Contextual Info: a FEATURES 140 MSPS Guaranteed Conversion Rate 100 MSPS Low Cost Version Available 330 MHz Analog Bandwidth 1 V p-p Analog Input Range Internal +2.5 V Reference Differential or Single-Ended Clock Input 3.3 V/5.0 V Three-State CMOS Outputs Single or Demultiplexed Output Ports