7 CL Search Results

B605

Abstract: wm110 AF112 3466 TWM-25 TWM-125-149 AF133 WM25 B-605 WM-1-33
Contextual Info: PRE - PRINTED WIRE MARKERS Wire Marker Cards WM-25 PART NUMBER EXPLANATION: Most Brady part numbers in this section follow the same two-part format: Brady Vinyl Cloth Wire Marker Card Legend Reads “25” Numbers 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7

ls273

Contextual Info: 8-B it Registers w ith Master Reset or Clock Enable S N 5 4 /7 4 L S 2 7 3 S N 5 4 /7 4 S 2 7 3 S N 5 4 /7 4 L S 3 7 7 S N 5 4 /7 4 S 3 7 7 Ordering Inform ation Features/B enefits • 20-Pin SKINNYDIP" saves space • 8-bit data path matches byte boundaries

Contextual Info: N Male Connector Clamp Attachment For 7/8 inch Annular, 7/8 inch Helical, 7/8 inch Superflexible, 7/8 inch Flexible TECHNICAL DATA SHEET PE44976 Configuration Connector Connector Interface Type Cable Attachment Method Shield/Contact Body Style N Male 7/8 inch Annular,7/8 inch Helical,7/8 inch Superflexible,7/8 inch Flexible

MSM518222

Contextual Info: MSM518222 CASCADE EXAMPLE ENABLE CLOCK RESET DIN0-7 RSTW SWCK WE,IE RSTW SWCK WE,IE Din0-7 FM1 Dout0-7 Din0-7 FM2 Dout0-7 RSTR SRCK RE,OE RSTR SRCK RE,OE DOUT0-7 RESET ENABLE CLOCK An-1 DIN0-7 FM1:Dout0-7 FM2:Din0-7 A0 A1 A2 tAC M0 M1 M2 Bn-1 An B0 B1 B2 Mn A0

MN74HC175

Abstract: MN74HC175S 74LS SERIES cmos logic data
Contextual Info: M N 74 H C 1 7 5 /M N 7 4 H C 1 7 5 S High-Speed CMOS Logic MN74HC Series M N 7 4 H C 1 7 5 / M N 7 4 H C 1 7 5 S Quad D-Type F lip -F lop s with Clear • Description P -3 M N 7 4 H C 1 7 5 /M N 7 4 H C 1 7 5 S c o n ta in fo u r q u a d D -ty p e flip-flop

Contextual Info: 3 A 0 Uî lf> 0 1 2 250 in I o wa ÜÎÎÉ rT n \j SECT. C 5 C A L E 2-1 3 ß O S E C T . ’ A '-'A ' CSCALE 2-15 CL JUJ Z AVAILABLE AVAILABLE NOT ABA1LAGLE r\ zO O _l f\l1 IÜLL 43 54. 7 48. 7 42. 7 36. 7 33. 7 30. 7 27. 7 24 . 7 21 . 7 1 8 .7 15.7 16 0

Contextual Info: VDP 31xxB PRELIMINARY DATASHEET Contents Page Section Title 5 1. Introduction 6 1.1. VDP Applications 7 2. Functional Description 7 2.1. Analog Front-End 7 2.1.1. Input Selector 7 2.1.2. Clamping 7 2.1.3. Automatic Gain Control 7 2.1.4. Analog-to-Digital Converters

HD6473278F

Contextual Info: Vdd 5 , 6 , 7 , 22,31 CLOCK 4 , 8 , 13,40 77/ H D 6 4 7 3 2 7 8 F II 8 / 3 2 7 63 EXTAL XTAL 9 10 FCR19.66M2G Cl.,- 1 0 p F 7/7 - CL2 1 0 p F W

Contextual Info: ASP—61921—0 2 —N .7 0 8 6 6 [ 1 8 . 0 0 0 ] ± . 0 0 3 [ . 0 8 ] 10 POSITIONS x .0 7 8 7 4 [ 2 . 0 0 0 ] - .0 7 8 7 4 [2 . 0 0 0 ] NOTE: END SHROUD NOT SHOWN IN SIDE VIEW FOR CLARITY. _ .0 7 8 7 4 [ 2 . 0 0 0 0 ] J .7 8 7 4 0 [ 2 0 . 0 0 0 ] + . 0 0 3 [ . 0 8 ]

DMT 02 ATEX F 001

Abstract: 3RV28 sirius dmt 02 atex f 001 catalog for 3RU overload relays siemens 3RA2921-1A 3RB2283-4AC1 3RV2011 3RB2143-4EB0
Contextual Info: Protection Equipment 7/2 7/7 7/19 7/21 7/22 7/23 7/24 7/25 7/26 7/29 7/32 7/33 7/37 7/40 7/44 7/55 7/56 7/57 7/58 7/59 7/60 7/61 7/62 7/65 7/67 7/69 7/71 7/73 7/78 7/79 7/80 7/81 Price groups PG 14O, 41B, 41E, 41F, 41G, 41H, 41J, 42F, 42J, 4N1 7/82 Introduction

UPD784044GC

Contextual Info: 1 0 ,1 2 ,5 4 , 7 1 9 ,1 1 ,5 5 ,5 7 ,6 2 ,6 7 , 7 2 10,12,54,71 9,11,55,57,62,67,72 Vdd O FCR8.0MC5 CLl CL2

Contextual Info: to CD 0 CD N |cr O a *0.5 25 o 1. ; THE MATING COUNTERPART P / U 2. A PPLIED CONTACT N O T E cc K LU r A C1 7 0 0 3 2 , 7 7 0 2 5 8 ,7 7 0 3 8 4 ) DSL LOCK PLATE MATERIAL ; COLOR Cl 7 2 1 2 7 e t c . ) ; PBT YELLOW a 7 • » ' G * - * - S* 2 3£*r •y ^

LS76A

Abstract: s76A SN5476 SN54LS76A SN74 SN7476 SN74H76 SN74LS76A V10112
Contextual Info: TYPES SN5476, SN54H76, SN54LS76A, SN7476, SN74H76, SN74LS76A DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR REVISED DECEMBER 1983 S N 5 4 7 B , S N 5 4 H 7 6 , S N 5 4 L S 7 6 A . . . J OR W P AC KA G E S N 7 4 7 6 , S N 7 4 H 7 6 . . . J O R N PACKAGE S N 7 4 L S 7 6 A . . . D . J OR N P AC KA G E

Contextual Info: CO. Cl ~7 Z ni l 3S1 j =0 .-* 2. 5 K *~ -7 * ? 172775, 172775 2. M o. 1 0 8 —5 1 6 6 3 - K ftjM S O U fr 1 1 4 -5 0 7 2 4. S* ^ ^ 5 2 * 17 2 5 1 -8 -ftfe A-A A y — *u -A3 1. 2. 3. 4. A 172780—Î 772780-4 HATE TA8 P /N 1 7 2 7 7 5 , 1 7 2 7 7 6 PROOUCT 5PEC - No* 1 0 8 - 5 1 6 6

74ls73

Abstract: 74LS73 dual JK 7473 dual JK 74 HCL 4 74ls731 HC 165 7473 HCT 7473
Contextual Info: - 68 - Dual JK -FFs with Clear 7473 1J 10 IQ GND 2K 2Q 2d 1 5 74LS73 0 7 X 9 X U - 7&1 (7473) 70/7 r - 7 o * tf-r j - r ' J - T ' i > 70 7 7 t - 9 •/ V h 'J a (74LS73) _IJ- — r n — t su i t h o ld 07']7 (N , L S f t i i )

2SC3271 N

Abstract: 2SC3271 2SC3271 P R3307 Transistor 126m
Contextual Info: ROHM CO 4DE LTD 7 ô S ô ci li cl J> Q00S7b3 1 E 3 RHM 2SC3271 h 7 > v ' 7 $ / I ransistors -7 ^ 3 3 - 0 7 ¡2 2 7 * 3 H M i £ f [ 7 0U - ^ N p N ' > u = l > S l i E i i 'f i f f i / H i g h Voltage Amp. Triple Diffused Planar NPN Silicon Transistor

74175

Contextual Info: 74175 VCC «O «fl a o 4P 30 JO 30 ClOCK ; a ì x o ckclr h t 1 Cil AB 0 7 4 7 4 9 ^~T 0 3 í > 7 a r 1 - iT < Ci.«6* a r lo L . > r < : . S x to B 'J ~ t ' < > / i 7 7, 10 20 20 J o : 20 GND y i f h ') t f P O S ) □ í > 7 ' ) 7 4,5 12.13 f 0 74 7 3 *0 J S # “

itt digit 2000

Abstract: ITT ccu 3000 i
Contextual Info: MbflZ?!! OOGfc.044 H T 01P 3250A ADVANCE INFORMATION Contents Page Section Title 4 4 4 1. 1.1. 1.2. Introduction Block Diagram System Configurations 7 7 7 2. 2.1. Functional Description Analog Front End 7 7 8 8 8 2.2. 2.3. 2.4. 2.5. 2.6. 2.7. Clamping Matrix

Contextual Info: TYPES SN5472, SN54H72, SN54L72, SN7472, SN74H72 AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR REVISED DECEMBER 1963 S N 5 4 7 2 , S N 5 4 H 7 2 , S N 5 4 L 7 2 _ I P AC KA G E S N 7 4 7 2 , S N 7 4 H 7 2 . . . J OR N P A C K A G E Package Options Include Plastic and

ci 7475

Abstract: 7475 D latch MC9375 7477 D latch 7475 data latch 7400 series list 7400 TTL TTL 7400 TTL 7475 MC5475
Contextual Info: f'vlTTL M C 540 0 /7 4 0 0 series QUAD LATCH M C5475 M C9375 M C 5477 M C 9377 • • • • MC7475 MC8375 M C7477 MC8377 MOTOROLA R ¿ (r 0 0 4 4 7 6 /O . • cl d S u f f i x F f o r 1 4 - p i n c e r a m i c p a c k a g e •Uci s»' ü 0 7 ' M C 5 4 ? , •7 4 7 7, M C 9 3 7 7 . 8 3 7 7 .

ir 9751

Abstract: 74257
Contextual Info: 1 2 3 LJ N fN N T O 2 7 . 6 15 o CL H LU I— < 1 2 * ^ i — <u- i; co"C"^b 3 : ~C Æ ¿7" 4 L ^ P /N 1 7 4 2 5 6 ^ 1 7391 7yb*'7~ "V -fe '7* U ^ ¿7“ P/N is t± ^ * -7 * 'L -o U 1 7 4 2 5 9 ,1 7 3 9 1 5 - ir * " ^ >17 i > ^ ' V 27 - 7 ’ u - — h P /N

Contextual Info: 4 3 1 2 N CD O LO N 2 .5 O -te ftir =| il s [ — in 1! V Tt V % V / AMP MARK y \ S O -* tS - - -§ 3 » lX K ÜJ 2: i i Q \ */ ~ • A-A ScCT. 7. -fc -7 * ^ ^ ^ 7 /t m m B-B SECT. = 7 7 5 0 9 0 - 1 CM> 7 75097 -7 CL> 2-3 2. lfc.t=ri&Æ:8t*&N0.

rca 711

Abstract: 40174B CD40174B Flip Flop DIP M40174BP SC1401 TC40174BP UPD417-4 HCC40174B HEF40174BP
Contextual Info: 133 — 401 7 4 B — Hex D Flip Flop mm, m *47 9 0 "/^ ? ' 7 T'J-feyh 3 7 V - / 7 7 D-yT D t L tcL *41L INPUTS TERMS 1,3.4.6.9. 11,13 141 PROTECTED Bt COS/MOS PROTECTION NETWORK tr • 60i8tf>D:M 7* •7 'J "/'T'7U»t'T tf »M is O UTPUT IN PUTS CLOCK DATA

Contextual Info: TTL MSI TYPE SN74LS424 TIM8224 TWO-PHASE CLOCK GENERATOR/DRIVER BU LLETIN NO. DL-S 7 7 1 2 4 7 5 . OCTOBER 1 9 7 6 -R E V IS E O AUGUST 1 9 7 7 Designed to be Interchangeable With Intel 8224 Single-Chip Clock Driver With Self-Contained Oscillator J OR N PA C KA G E