6JUN2005 Search Results

SN74AUC2G125DCUR

Contextual Info: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74BCT29843 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993 • • • DW OR NT PACKAGE TOP VIEW BiCMOS Process With CMOS Inputs and TTL Outputs Substantially Reduces Standby Current Input Has 50 kΩ

Contextual Info: TLV5619ĆEP 2.7 V TO 5.5 V 12ĆBIT PARALLEL DIGITALĆTOĆANALOG CONVERTER WITH POWER DOWN ą SGLS124A − JULY 2002 − REVISED DECEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D D applications − One Assembly/Test Site, One Fabrication Site

A115-A

Abstract: C101 SN74AUC2G125
Contextual Info: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN54HC652, SN74HC652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS151E – DECEMBER 1982 – REVISED MARCH 2003 D D D D D D D Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max ICC

Contextual Info: SN10KHT5578 OCTAL TTL-TO-ECL TRANSLATOR WITH D-TYPE EDGE-TRIGGERED FLIP-FLOPS AND OUTPUT ENABLE SDZS014A – APRIL 1990 – REVISED JANUARY 1999 D D D D D D D DW OR NT PACKAGE TOP VIEW 10KH Compatible TTL Clock and ECL Control Inputs Noninverting Outputs

SN74AUC2G80DCTR

Contextual Info: SN74AUC2G80 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES540A – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN54AS181B, SN74AS181A ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS SDAS209B – DECEMBER 1982 – REVISED DECEMBER 1994 • • • • SN54AS181B . . . JT OR JW PACKAGE SN74AS181A . . . N OR NT PACKAGE TOP VIEW Full Look Ahead for High-Speed Operations on Long Words

Contextual Info: SN74LVC2G157 SINGLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER www.ti.com SCES207I – APRIL 1999 – REVISED JUNE 2005 FEATURES • • • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

74LVC2G132-5V

Contextual Info: SN74LVC2G132 DUAL 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS www.ti.com SCES547A – FEBRUARY 2004 – REVISED JUNE 2005 FEATURES • • • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN75196 MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS188B – MAY 1995 – REVISED APRIL 1998 D D D D D D D DW OR N PACKAGE TOP VIEW Single Chip With Easy Interface Between UART and Serial-Port Connector of an External Modem or Other Computer Peripheral Five Drivers and Three Receivers Meet or

SN74AUC2G240DCUR

Contextual Info: SN74AUC2G240 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES534A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

pcb design seven segment display

Contextual Info: CD74HCT4543 BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER SCHS281A – REVISED MAY 2003 D D D D D D D D D E PACKAGE TOP VIEW 4.5-V to 5.5-V VCC Operation Input Latches for BCD Code Storage Blanking Capability Phase Input for Complementing Outputs Fanout (Over Temperature Range)

Contextual Info: TS5A2053 SINGLEĆCHANNEL 10ĆW SPDT ANALOG SWITCH WITH ENABLE www.ti.com SCDS183 – JANUARY 2005 Description Features The TS5A2053 is a single-pole double-throw SPDT analog switch that is designed to operate from 1.65 V to 5.5 V. This device can handle both digital and analog

Contextual Info: SN75172 QUADRUPLE DIFFRENTIAL LINE DRIVER SLLS038B – OCTOBER 1980 – REVISED MAY 1995 D D D D D D D D D N PACKAGE TOP VIEW Meets or Exceeds the Requirements of ANSI Standards EIA/TIA-422-B and RS-485 and ITU Recommendation V.11 Designed for Multipoint Transmission on

lm317

Contextual Info: TL1431ĆQ1 PRECISION PROGRAMMABLE REFERENCE SLVS534A − JUNE 2004 − REVISED JULY 2004 D Qualification in Accordance With D PACKAGE TOP VIEW AEC-Q100† D Qualified for Automotive Applications D Customer-Specific Configuration Control CATHODE ANODE ANODE

Contextual Info: SN74F1016 16-BIT SCHOTTKY BARRIER DIODE R-C BUS-TERMINATION ARRAY SDFS093 – NOVEMBER 1992 – REVISED DECEMBER 1993 • • • DW PACKAGE TOP VIEW Designed to Reduce Reflection Noise Repetitive Peak Forward Current . . . 300 mA 16-Bit Array Structure Suited for

Contextual Info: SN74BCT29843 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993 • • • DW OR NT PACKAGE TOP VIEW BiCMOS Process With CMOS Inputs and TTL Outputs Substantially Reduces Standby Current Input Has 50 kΩ

IC data book free

Contextual Info: SN74LVC2G240 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES208F – APRIL 1999 – REVISED JULY 2005 FEATURES • • • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74LVC1G80 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES221O – APRIL 1999 – REVISED JUNE 2005 FEATURES • • • • • • • • • DBV OR DCK PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74AUC2G240 DUAL BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES534A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

SN74LVC2G125DCTR

Contextual Info: SN74LVC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES204K – APRIL 1999 – REVISED JUNE 2005 FEATURES • • • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: CD74HC646 S IGN OR Data sheet acquired from Harris Semiconductor SCHS193A January 1998 - Revised May 2003 NE E OMM REC NOT DF NDE ES WD High-Speed CMOS Logic Octal Bus Transceiver/Register, Three-State Features Description • Independent Registers for A and B Buses

R-PDSO-G8 Package 8 PIN

Contextual Info: PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 • FEATURES • • • • • • • • • 2-Bit Bidirectional Translator for SDA and SCL Lines in Mixed-Mode I2C Applications